derek.holloway
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47 lines
1.9 KiB
YAML
47 lines
1.9 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -o - %s -mtriple=aarch64 -run-pass=machine-scheduler -verify-machineinstrs | FileCheck %s
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# RUN: llc -o - %s -mtriple=aarch64 -passes=machine-scheduler | FileCheck %s
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--- |
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target datalayout = "e-m:e-i8:8:32-i16:16:32-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64"
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@a = dso_local global i32 2, align 4
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@b = dso_local global i32 4, align 4
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define i32 @fuseaddress(i32 %num) #0 {
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entry:
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%0 = load i32, ptr @a, align 4
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%1 = load i32, ptr @b, align 4
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%mul = mul nsw i32 %0, %1
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ret i32 %mul
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}
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attributes #0 = { "target-cpu"="cortex-a55" }
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---
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name: fuseaddress
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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liveins:
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- { reg: '$w0' }
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body: |
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bb.0.entry:
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liveins: $w0
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; CHECK-LABEL: name: fuseaddress
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; CHECK: liveins: $w0
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; CHECK: [[ADRP:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) @a
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; CHECK: [[LDRWui:%[0-9]+]]:gpr32 = LDRWui [[ADRP]], target-flags(aarch64-pageoff, aarch64-nc) @a :: (dereferenceable load (s32) from @a)
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; CHECK: [[ADRP1:%[0-9]+]]:gpr64common = ADRP target-flags(aarch64-page) @b
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; CHECK: [[LDRWui1:%[0-9]+]]:gpr32 = LDRWui [[ADRP1]], target-flags(aarch64-pageoff, aarch64-nc) @b :: (dereferenceable load (s32) from @b)
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; CHECK: [[MADDWrrr:%[0-9]+]]:gpr32 = nsw MADDWrrr [[LDRWui]], [[LDRWui1]], $wzr
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; CHECK: $w0 = COPY [[MADDWrrr]]
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; CHECK: RET_ReallyLR implicit $w0
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%1:gpr64common = ADRP target-flags(aarch64-page) @a
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%4:gpr64common = ADRP target-flags(aarch64-page) @b
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%2:gpr32 = LDRWui killed %1:gpr64common, target-flags(aarch64-pageoff, aarch64-nc) @a :: (dereferenceable load (s32) from @a)
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%5:gpr32 = LDRWui killed %4:gpr64common, target-flags(aarch64-pageoff, aarch64-nc) @b :: (dereferenceable load (s32) from @b)
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%6:gpr32 = nsw MADDWrrr killed %2:gpr32, killed %5:gpr32, $wzr
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$w0 = COPY %6:gpr32
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RET_ReallyLR implicit $w0
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