derek.holloway
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55 lines
1.9 KiB
LLVM
55 lines
1.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=aarch64-none-linux-gnu | FileCheck %s
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define i16 @test_add_zext_v8i16(<8 x i8> %a, <8 x i8> %b) local_unnamed_addr #0 {
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; CHECK-LABEL: test_add_zext_v8i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
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; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
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; CHECK-NEXT: mov v0.d[1], v1.d[0]
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; CHECK-NEXT: uaddlv h0, v0.16b
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; CHECK-NEXT: umov w0, v0.h[0]
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; CHECK-NEXT: ret
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%z1 = zext <8 x i8> %a to <8 x i16>
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%z2 = zext <8 x i8> %b to <8 x i16>
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%z = add <8 x i16> %z1, %z2
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%r = call i16 @llvm.vector.reduce.add.v8i16(<8 x i16> %z)
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ret i16 %r
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}
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define i32 @test_add_zext_v4i32(<4 x i16> %a, <4 x i16> %b) local_unnamed_addr #0 {
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; CHECK-LABEL: test_add_zext_v4i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
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; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
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; CHECK-NEXT: mov v0.d[1], v1.d[0]
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; CHECK-NEXT: uaddlv s0, v0.8h
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; CHECK-NEXT: fmov w0, s0
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; CHECK-NEXT: ret
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%z1 = zext <4 x i16> %a to <4 x i32>
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%z2 = zext <4 x i16> %b to <4 x i32>
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%z = add <4 x i32> %z1, %z2
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%r = call i32 @llvm.vector.reduce.add.v4i32(<4 x i32> %z)
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ret i32 %r
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}
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define i64 @test_add_zext_v2i64(<2 x i32> %a, <2 x i32> %b) local_unnamed_addr #0 {
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; CHECK-LABEL: test_add_zext_v2i64:
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; CHECK: // %bb.0:
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; CHECK-NEXT: // kill: def $d0 killed $d0 def $q0
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; CHECK-NEXT: // kill: def $d1 killed $d1 def $q1
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; CHECK-NEXT: mov v0.d[1], v1.d[0]
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; CHECK-NEXT: uaddlv d0, v0.4s
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; CHECK-NEXT: fmov x0, d0
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; CHECK-NEXT: ret
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%z1 = zext <2 x i32> %a to <2 x i64>
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%z2 = zext <2 x i32> %b to <2 x i64>
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%z = add <2 x i64> %z1, %z2
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%r = call i64 @llvm.vector.reduce.add.v2i64(<2 x i64> %z)
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ret i64 %r
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}
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declare i16 @llvm.vector.reduce.add.v8i16(<8 x i16>)
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declare i32 @llvm.vector.reduce.add.v4i32(<4 x i32>)
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declare i64 @llvm.vector.reduce.add.v2i64(<2 x i64>)
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