derek.holloway
7502bf64a4
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117 lines
2.9 KiB
LLVM
117 lines
2.9 KiB
LLVM
; RUN: llc < %s -mtriple=aarch64 -asm-verbose=false | FileCheck %s --check-prefix=CHECK
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; RUN: llc < %s -mtriple=aarch64 -mattr=+predres -asm-verbose=false | FileCheck %s --check-prefix=PREDRES
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; RUN: llc < %s -mtriple=aarch64 -mattr=+specres2 -asm-verbose=false | FileCheck %s --check-prefix=SPECRES2
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; RUN: llc < %s -mtriple=aarch64 -mattr=+gcie -asm-verbose=false | FileCheck %s --check-prefix=GCIE
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; RUN: llc < %s -mtriple=aarch64 -mattr=+poe2 -asm-verbose=false | FileCheck %s --check-prefix=POE2
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declare void @llvm.aarch64.sys(i32 immarg, i32 immarg, i32 immarg, i32 immarg,
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i64)
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define void @sys_random(i64 %x) {
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; CHECK-LABEL: sys_random:
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; CHECK: sys #0, c7, c10, #6, x0
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; CHECK-NEXT: ret
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entry:
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call void @llvm.aarch64.sys(i32 0, i32 7, i32 10, i32 6, i64 %x)
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ret void
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}
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define void @sys_ic_iallu() {
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; CHECK-LABEL: sys_ic_iallu:
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; CHECK: ic iallu
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; CHECK-NEXT: ret
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entry:
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call void @llvm.aarch64.sys(i32 0, i32 7, i32 5, i32 0, i64 0)
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ret void
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}
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define void @sys_dc_cvac(i64 %x) {
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; CHECK-LABEL: sys_dc_cvac:
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; CHECK: dc cvac, x0
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; CHECK-NEXT: ret
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entry:
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call void @llvm.aarch64.sys(i32 3, i32 7, i32 10, i32 1, i64 %x)
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ret void
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}
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define void @sys_at_s1e2w(i64 %x) {
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; CHECK-LABEL: sys_at_s1e2w:
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; CHECK: at s1e2w, x0
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; CHECK-NEXT: ret
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entry:
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call void @llvm.aarch64.sys(i32 4, i32 7, i32 8, i32 1, i64 %x)
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ret void
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}
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define void @sys_tlbi_vmalle1() {
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; CHECK-LABEL: sys_tlbi_vmalle1:
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; CHECK: tlbi vmalle1
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; CHECK-NEXT: ret
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entry:
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call void @llvm.aarch64.sys(i32 0, i32 8, i32 7, i32 0, i64 0)
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ret void
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}
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define void @sys_cfp_rctx(i64 %x) {
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; PREDRES-LABEL: sys_cfp_rctx:
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; PREDRES: cfp rctx, x0
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; PREDRES-NEXT: ret
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entry:
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call void @llvm.aarch64.sys(i32 3, i32 7, i32 3, i32 4, i64 %x)
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ret void
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}
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define void @sys_dvp_rctx(i64 %x) {
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; PREDRES-LABEL: sys_dvp_rctx:
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; PREDRES: dvp rctx, x0
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; PREDRES-NEXT: ret
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entry:
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call void @llvm.aarch64.sys(i32 3, i32 7, i32 3, i32 5, i64 %x)
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ret void
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}
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define void @sys_cpp_rctx(i64 %x) {
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; PREDRES-LABEL: sys_cpp_rctx:
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; PREDRES: cpp rctx, x0
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; PREDRES-NEXT: ret
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entry:
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call void @llvm.aarch64.sys(i32 3, i32 7, i32 3, i32 7, i64 %x)
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ret void
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}
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define void @sys_cosp_rctx(i64 %x) {
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; SPECRES2-LABEL: sys_cosp_rctx:
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; SPECRES2: cosp rctx, x0
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; SPECRES2-NEXT: ret
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entry:
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call void @llvm.aarch64.sys(i32 3, i32 7, i32 3, i32 6, i64 %x)
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ret void
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}
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define void @sys_gic_cdaff(i64 %x) {
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; GCIE-LABEL: sys_gic_cdaff:
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; GCIE: gic cdaff, x0
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; GCIE-NEXT: ret
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entry:
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call void @llvm.aarch64.sys(i32 0, i32 12, i32 1, i32 3, i64 %x)
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ret void
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}
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define void @sys_gsb_sys() {
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; GCIE-LABEL: sys_gsb_sys:
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; GCIE: gsb sys
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; GCIE-NEXT: ret
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entry:
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call void @llvm.aarch64.sys(i32 0, i32 12, i32 0, i32 0, i64 0)
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ret void
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}
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define void @sys_plbi_vmalle1() {
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; POE2-LABEL: sys_plbi_vmalle1:
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; POE2: plbi vmalle1
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; POE2-NEXT: ret
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entry:
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call void @llvm.aarch64.sys(i32 0, i32 10, i32 7, i32 0, i64 0)
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ret void
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}
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