derek.holloway
7502bf64a4
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27 lines
1.1 KiB
LLVM
27 lines
1.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s | FileCheck %s
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target datalayout = "e-m:e-i64:64-i128:128-n32:64-S128"
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target triple = "aarch64-unknown-linux-gnu"
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define <4 x i16> @f(<4 x i32> %vqdmlal_v3.i, <8 x i16> %x5) {
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; CHECK-LABEL: f:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: dup v0.4h, v0.h[4]
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; CHECK-NEXT: mov v0.h[1], v1.h[0]
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; CHECK-NEXT: // kill: def $d0 killed $d0 killed $q0
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; CHECK-NEXT: ret
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entry:
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; Check that we don't just dup the input vector. The code emitted is ext, dup, ext, ext
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; but only match the last three instructions as the first two could be combined to
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; a dup2 at some stage.
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%x4 = extractelement <4 x i32> %vqdmlal_v3.i, i32 2
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%vgetq_lane = trunc i32 %x4 to i16
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%vecinit.i = insertelement <4 x i16> undef, i16 %vgetq_lane, i32 0
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%vecinit2.i = insertelement <4 x i16> %vecinit.i, i16 %vgetq_lane, i32 2
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%vecinit3.i = insertelement <4 x i16> %vecinit2.i, i16 %vgetq_lane, i32 3
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%vgetq_lane261 = extractelement <8 x i16> %x5, i32 0
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%vset_lane267 = insertelement <4 x i16> %vecinit3.i, i16 %vgetq_lane261, i32 1
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ret <4 x i16> %vset_lane267
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}
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