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94 lines
4.3 KiB
LLVM
94 lines
4.3 KiB
LLVM
; RUN: llc -mtriple arm64-apple-ios -O3 -o - < %s | FileCheck %s
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; <rdar://problem/14477220>
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%class.Complex = type { float, float }
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%class.Complex_int = type { i32, i32 }
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%class.Complex_long = type { i64, i64 }
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; CHECK-LABEL: @test
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; CHECK: add [[BASE:x[0-9]+]], x0, x1, lsl #3
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; CHECK-DAG: ldp [[CPLX1_I:s[0-9]+]], [[CPLX1_R:s[0-9]+]], [[[BASE]]]
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; CHECK-DAG: ldp [[CPLX2_I:s[0-9]+]], [[CPLX2_R:s[0-9]+]], [[[BASE]], #64]
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; CHECK: fadd {{s[0-9]+}}, [[CPLX2_I]], [[CPLX1_I]]
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; CHECK: fadd {{s[0-9]+}}, [[CPLX2_R]], [[CPLX1_R]]
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; CHECK: ret
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define void @test(ptr nocapture %out, i64 %out_start) {
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entry:
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%arrayidx = getelementptr inbounds %class.Complex, ptr %out, i64 %out_start
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%0 = load i64, ptr %arrayidx, align 4
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%t0.sroa.0.0.extract.trunc = trunc i64 %0 to i32
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%1 = bitcast i32 %t0.sroa.0.0.extract.trunc to float
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%t0.sroa.2.0.extract.shift = lshr i64 %0, 32
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%t0.sroa.2.0.extract.trunc = trunc i64 %t0.sroa.2.0.extract.shift to i32
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%2 = bitcast i32 %t0.sroa.2.0.extract.trunc to float
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%add = add i64 %out_start, 8
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%arrayidx2 = getelementptr inbounds %class.Complex, ptr %out, i64 %add
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%3 = load float, ptr %arrayidx2, align 4
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%add.i = fadd float %3, %1
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%retval.sroa.0.0.vec.insert.i = insertelement <2 x float> undef, float %add.i, i32 0
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%r.i = getelementptr inbounds %class.Complex, ptr %arrayidx2, i64 0, i32 1
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%4 = load float, ptr %r.i, align 4
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%add5.i = fadd float %4, %2
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%retval.sroa.0.4.vec.insert.i = insertelement <2 x float> %retval.sroa.0.0.vec.insert.i, float %add5.i, i32 1
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store <2 x float> %retval.sroa.0.4.vec.insert.i, ptr %arrayidx, align 4
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ret void
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}
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; CHECK-LABEL: @test_int
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; CHECK: add [[BASE:x[0-9]+]], x0, x1, lsl #3
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; CHECK-DAG: ldp [[CPLX1_I:w[0-9]+]], [[CPLX1_R:w[0-9]+]], [[[BASE]]]
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; CHECK-DAG: ldp [[CPLX2_I:w[0-9]+]], [[CPLX2_R:w[0-9]+]], [[[BASE]], #64]
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; CHECK: add {{w[0-9]+}}, [[CPLX2_I]], [[CPLX1_I]]
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; CHECK: add {{w[0-9]+}}, [[CPLX2_R]], [[CPLX1_R]]
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; CHECK: ret
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define void @test_int(ptr nocapture %out, i64 %out_start) {
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entry:
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%arrayidx = getelementptr inbounds %class.Complex_int, ptr %out, i64 %out_start
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%0 = load i64, ptr %arrayidx, align 4
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%t0.sroa.0.0.extract.trunc = trunc i64 %0 to i32
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%1 = bitcast i32 %t0.sroa.0.0.extract.trunc to i32
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%t0.sroa.2.0.extract.shift = lshr i64 %0, 32
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%t0.sroa.2.0.extract.trunc = trunc i64 %t0.sroa.2.0.extract.shift to i32
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%2 = bitcast i32 %t0.sroa.2.0.extract.trunc to i32
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%add = add i64 %out_start, 8
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%arrayidx2 = getelementptr inbounds %class.Complex_int, ptr %out, i64 %add
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%3 = load i32, ptr %arrayidx2, align 4
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%add.i = add i32 %3, %1
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%retval.sroa.0.0.vec.insert.i = insertelement <2 x i32> undef, i32 %add.i, i32 0
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%r.i = getelementptr inbounds %class.Complex_int, ptr %arrayidx2, i64 0, i32 1
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%4 = load i32, ptr %r.i, align 4
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%add5.i = add i32 %4, %2
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%retval.sroa.0.4.vec.insert.i = insertelement <2 x i32> %retval.sroa.0.0.vec.insert.i, i32 %add5.i, i32 1
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store <2 x i32> %retval.sroa.0.4.vec.insert.i, ptr %arrayidx, align 4
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ret void
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}
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; CHECK-LABEL: @test_long
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; CHECK: add [[BASE:x[0-9]+]], x0, x1, lsl #4
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; CHECK-DAG: ldp [[CPLX1_I:x[0-9]+]], [[CPLX1_R:x[0-9]+]], [[[BASE]]]
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; CHECK-DAG: ldp [[CPLX2_I:x[0-9]+]], [[CPLX2_R:x[0-9]+]], [[[BASE]], #128]
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; CHECK: add {{x[0-9]+}}, [[CPLX2_I]], [[CPLX1_I]]
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; CHECK: add {{x[0-9]+}}, [[CPLX2_R]], [[CPLX1_R]]
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; CHECK: ret
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define void @test_long(ptr nocapture %out, i64 %out_start) {
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entry:
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%arrayidx = getelementptr inbounds %class.Complex_long, ptr %out, i64 %out_start
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%0 = load i128, ptr %arrayidx, align 4
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%t0.sroa.0.0.extract.trunc = trunc i128 %0 to i64
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%1 = bitcast i64 %t0.sroa.0.0.extract.trunc to i64
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%t0.sroa.2.0.extract.shift = lshr i128 %0, 64
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%t0.sroa.2.0.extract.trunc = trunc i128 %t0.sroa.2.0.extract.shift to i64
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%2 = bitcast i64 %t0.sroa.2.0.extract.trunc to i64
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%add = add i64 %out_start, 8
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%arrayidx2 = getelementptr inbounds %class.Complex_long, ptr %out, i64 %add
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%3 = load i64, ptr %arrayidx2, align 4
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%add.i = add i64 %3, %1
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%retval.sroa.0.0.vec.insert.i = insertelement <2 x i64> undef, i64 %add.i, i32 0
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%r.i = getelementptr inbounds %class.Complex_long, ptr %arrayidx2, i32 0, i32 1
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%4 = load i64, ptr %r.i, align 4
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%add5.i = add i64 %4, %2
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%retval.sroa.0.4.vec.insert.i = insertelement <2 x i64> %retval.sroa.0.0.vec.insert.i, i64 %add5.i, i32 1
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store <2 x i64> %retval.sroa.0.4.vec.insert.i, ptr %arrayidx, align 4
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ret void
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}
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