derek.holloway
7502bf64a4
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354 lines
13 KiB
LLVM
354 lines
13 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 3
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; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon -fp-contract=fast -aarch64-enable-sink-fold=true | FileCheck %s --check-prefixes=CHECK,CHECK-SD
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; RUN: llc < %s -global-isel -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+neon -fp-contract=fast -aarch64-enable-sink-fold=true | FileCheck %s --check-prefixes=CHECK,CHECK-GI
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define <4 x i8> @test_varidx_extract_v8s8(<8 x i8> %x, i32 %idx) {
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; CHECK-SD-LABEL: test_varidx_extract_v8s8:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: sub sp, sp, #16
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; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
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; CHECK-SD-NEXT: add x8, sp, #8
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; CHECK-SD-NEXT: // kill: def $w0 killed $w0 def $x0
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; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
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; CHECK-SD-NEXT: str d0, [sp, #8]
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; CHECK-SD-NEXT: bfxil x8, x0, #0, #3
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; CHECK-SD-NEXT: ld1 { v1.b }[0], [x8]
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; CHECK-SD-NEXT: mov v1.b[2], v0.b[1]
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; CHECK-SD-NEXT: mov v1.b[4], v0.b[2]
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; CHECK-SD-NEXT: mov v1.b[6], v0.b[3]
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; CHECK-SD-NEXT: fmov d0, d1
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; CHECK-SD-NEXT: add sp, sp, #16
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test_varidx_extract_v8s8:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: sub sp, sp, #16
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; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
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; CHECK-GI-NEXT: mov w9, w0
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; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
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; CHECK-GI-NEXT: mov b1, v0.b[1]
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; CHECK-GI-NEXT: add x8, sp, #8
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; CHECK-GI-NEXT: and x9, x9, #0x7
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; CHECK-GI-NEXT: str d0, [sp, #8]
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; CHECK-GI-NEXT: mov b2, v0.b[2]
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; CHECK-GI-NEXT: lsl x10, x9, #1
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; CHECK-GI-NEXT: mov b0, v0.b[3]
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; CHECK-GI-NEXT: sub x9, x10, x9
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; CHECK-GI-NEXT: ldrb w8, [x8, x9]
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; CHECK-GI-NEXT: fmov w9, s1
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; CHECK-GI-NEXT: fmov s1, w8
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; CHECK-GI-NEXT: fmov w8, s2
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; CHECK-GI-NEXT: mov v1.h[1], w9
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; CHECK-GI-NEXT: mov v1.h[2], w8
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; CHECK-GI-NEXT: fmov w8, s0
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; CHECK-GI-NEXT: mov v1.h[3], w8
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; CHECK-GI-NEXT: fmov d0, d1
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; CHECK-GI-NEXT: add sp, sp, #16
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; CHECK-GI-NEXT: ret
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%tmp = extractelement <8 x i8> %x, i32 %idx
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%tmp2 = insertelement <4 x i8> undef, i8 %tmp, i32 0
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%tmp3 = extractelement <8 x i8> %x, i32 1
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%tmp4 = insertelement <4 x i8> %tmp2, i8 %tmp3, i32 1
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%tmp5 = extractelement <8 x i8> %x, i32 2
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%tmp6 = insertelement <4 x i8> %tmp4, i8 %tmp5, i32 2
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%tmp7 = extractelement <8 x i8> %x, i32 3
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%tmp8 = insertelement <4 x i8> %tmp6, i8 %tmp7, i32 3
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ret <4 x i8> %tmp8
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}
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define <8 x i8> @test_varidx_extract_v16s8(<16 x i8> %x, i32 %idx) {
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; CHECK-SD-LABEL: test_varidx_extract_v16s8:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: sub sp, sp, #16
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; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
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; CHECK-SD-NEXT: mov x8, sp
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; CHECK-SD-NEXT: // kill: def $w0 killed $w0 def $x0
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; CHECK-SD-NEXT: str q0, [sp]
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; CHECK-SD-NEXT: bfxil x8, x0, #0, #4
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; CHECK-SD-NEXT: ldr b1, [x8]
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; CHECK-SD-NEXT: mov v1.b[1], v0.b[1]
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; CHECK-SD-NEXT: mov v1.b[2], v0.b[2]
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; CHECK-SD-NEXT: mov v1.b[3], v0.b[3]
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; CHECK-SD-NEXT: mov v1.b[4], v0.b[4]
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; CHECK-SD-NEXT: mov v1.b[5], v0.b[5]
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; CHECK-SD-NEXT: mov v1.b[6], v0.b[6]
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; CHECK-SD-NEXT: mov v1.b[7], v0.b[7]
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; CHECK-SD-NEXT: fmov d0, d1
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; CHECK-SD-NEXT: add sp, sp, #16
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test_varidx_extract_v16s8:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: sub sp, sp, #16
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; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
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; CHECK-GI-NEXT: mov w9, w0
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; CHECK-GI-NEXT: mov x8, sp
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; CHECK-GI-NEXT: str q0, [sp]
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; CHECK-GI-NEXT: and x9, x9, #0xf
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; CHECK-GI-NEXT: lsl x10, x9, #1
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; CHECK-GI-NEXT: sub x9, x10, x9
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; CHECK-GI-NEXT: ldr b1, [x8, x9]
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; CHECK-GI-NEXT: mov v1.b[1], v0.b[1]
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; CHECK-GI-NEXT: mov v1.b[2], v0.b[2]
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; CHECK-GI-NEXT: mov v1.b[3], v0.b[3]
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; CHECK-GI-NEXT: mov v1.b[4], v0.b[4]
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; CHECK-GI-NEXT: mov v1.b[5], v0.b[5]
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; CHECK-GI-NEXT: mov v1.b[6], v0.b[6]
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; CHECK-GI-NEXT: mov v1.b[7], v0.b[7]
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; CHECK-GI-NEXT: fmov d0, d1
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; CHECK-GI-NEXT: add sp, sp, #16
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; CHECK-GI-NEXT: ret
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%tmp = extractelement <16 x i8> %x, i32 %idx
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%tmp2 = insertelement <8 x i8> undef, i8 %tmp, i32 0
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%tmp3 = extractelement <16 x i8> %x, i32 1
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%tmp4 = insertelement <8 x i8> %tmp2, i8 %tmp3, i32 1
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%tmp5 = extractelement <16 x i8> %x, i32 2
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%tmp6 = insertelement <8 x i8> %tmp4, i8 %tmp5, i32 2
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%tmp7 = extractelement <16 x i8> %x, i32 3
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%tmp8 = insertelement <8 x i8> %tmp6, i8 %tmp7, i32 3
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%tmp9 = extractelement <16 x i8> %x, i32 4
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%tmp10 = insertelement <8 x i8> %tmp8, i8 %tmp9, i32 4
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%tmp11 = extractelement <16 x i8> %x, i32 5
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%tmp12 = insertelement <8 x i8> %tmp10, i8 %tmp11, i32 5
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%tmp13 = extractelement <16 x i8> %x, i32 6
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%tmp14 = insertelement <8 x i8> %tmp12, i8 %tmp13, i32 6
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%tmp15 = extractelement <16 x i8> %x, i32 7
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%tmp16 = insertelement <8 x i8> %tmp14, i8 %tmp15, i32 7
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ret <8 x i8> %tmp16
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}
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define i16 @test_varidx_extract_v2s16(<2 x i16> %x, i32 %idx) {
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; CHECK-SD-LABEL: test_varidx_extract_v2s16:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: sub sp, sp, #16
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; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
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; CHECK-SD-NEXT: add x8, sp, #8
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; CHECK-SD-NEXT: // kill: def $w0 killed $w0 def $x0
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; CHECK-SD-NEXT: str d0, [sp, #8]
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; CHECK-SD-NEXT: bfi x8, x0, #2, #1
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; CHECK-SD-NEXT: ldr w0, [x8]
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; CHECK-SD-NEXT: add sp, sp, #16
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test_varidx_extract_v2s16:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: sub sp, sp, #16
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; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
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; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
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; CHECK-GI-NEXT: mov s1, v0.s[1]
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; CHECK-GI-NEXT: mov w9, w0
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; CHECK-GI-NEXT: add x8, sp, #12
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; CHECK-GI-NEXT: str h0, [sp, #12]
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; CHECK-GI-NEXT: and x9, x9, #0x1
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; CHECK-GI-NEXT: str h1, [sp, #14]
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; CHECK-GI-NEXT: ldrh w0, [x8, x9, lsl #1]
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; CHECK-GI-NEXT: add sp, sp, #16
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; CHECK-GI-NEXT: ret
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%tmp = extractelement <2 x i16> %x, i32 %idx
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ret i16 %tmp
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}
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define <2 x i16> @test_varidx_extract_v4s16(<4 x i16> %x, i32 %idx) {
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; CHECK-SD-LABEL: test_varidx_extract_v4s16:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: sub sp, sp, #16
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; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
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; CHECK-SD-NEXT: add x8, sp, #8
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; CHECK-SD-NEXT: // kill: def $w0 killed $w0 def $x0
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; CHECK-SD-NEXT: // kill: def $d0 killed $d0 def $q0
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; CHECK-SD-NEXT: str d0, [sp, #8]
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; CHECK-SD-NEXT: bfi x8, x0, #1, #2
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; CHECK-SD-NEXT: ld1 { v1.h }[0], [x8]
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; CHECK-SD-NEXT: mov v1.h[2], v0.h[1]
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; CHECK-SD-NEXT: fmov d0, d1
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; CHECK-SD-NEXT: add sp, sp, #16
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test_varidx_extract_v4s16:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: sub sp, sp, #16
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; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
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; CHECK-GI-NEXT: mov w9, w0
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; CHECK-GI-NEXT: mov w8, #2 // =0x2
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; CHECK-GI-NEXT: add x10, sp, #8
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; CHECK-GI-NEXT: and x9, x9, #0x3
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; CHECK-GI-NEXT: // kill: def $d0 killed $d0 def $q0
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; CHECK-GI-NEXT: str d0, [sp, #8]
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; CHECK-GI-NEXT: umaddl x8, w9, w8, x10
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; CHECK-GI-NEXT: umov w9, v0.h[1]
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; CHECK-GI-NEXT: ld1 { v0.h }[0], [x8]
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; CHECK-GI-NEXT: mov v0.s[1], w9
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; CHECK-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
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; CHECK-GI-NEXT: add sp, sp, #16
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; CHECK-GI-NEXT: ret
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%tmp = extractelement <4 x i16> %x, i32 %idx
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%tmp2 = insertelement <2 x i16> undef, i16 %tmp, i32 0
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%tmp3 = extractelement <4 x i16> %x, i32 1
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%tmp4 = insertelement <2 x i16> %tmp2, i16 %tmp3, i32 1
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ret <2 x i16> %tmp4
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}
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define <4 x i16> @test_varidx_extract_v8s16(<8 x i16> %x, i32 %idx) {
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; CHECK-SD-LABEL: test_varidx_extract_v8s16:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: sub sp, sp, #16
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; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
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; CHECK-SD-NEXT: mov x8, sp
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; CHECK-SD-NEXT: // kill: def $w0 killed $w0 def $x0
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; CHECK-SD-NEXT: str q0, [sp]
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; CHECK-SD-NEXT: bfi x8, x0, #1, #3
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; CHECK-SD-NEXT: ldr h1, [x8]
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; CHECK-SD-NEXT: mov v1.h[1], v0.h[1]
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; CHECK-SD-NEXT: mov v1.h[2], v0.h[2]
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; CHECK-SD-NEXT: mov v1.h[3], v0.h[3]
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; CHECK-SD-NEXT: fmov d0, d1
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; CHECK-SD-NEXT: add sp, sp, #16
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test_varidx_extract_v8s16:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: sub sp, sp, #16
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; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
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; CHECK-GI-NEXT: mov w9, w0
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; CHECK-GI-NEXT: mov x8, sp
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; CHECK-GI-NEXT: str q0, [sp]
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; CHECK-GI-NEXT: and x9, x9, #0x7
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; CHECK-GI-NEXT: ldr h1, [x8, x9, lsl #1]
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; CHECK-GI-NEXT: mov v1.h[1], v0.h[1]
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; CHECK-GI-NEXT: mov v1.h[2], v0.h[2]
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; CHECK-GI-NEXT: mov v1.h[3], v0.h[3]
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; CHECK-GI-NEXT: fmov d0, d1
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; CHECK-GI-NEXT: add sp, sp, #16
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; CHECK-GI-NEXT: ret
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%tmp = extractelement <8 x i16> %x, i32 %idx
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%tmp2 = insertelement <4 x i16> undef, i16 %tmp, i32 0
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%tmp3 = extractelement <8 x i16> %x, i32 1
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%tmp4 = insertelement <4 x i16> %tmp2, i16 %tmp3, i32 1
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%tmp5 = extractelement <8 x i16> %x, i32 2
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%tmp6 = insertelement <4 x i16> %tmp4, i16 %tmp5, i32 2
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%tmp7 = extractelement <8 x i16> %x, i32 3
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%tmp8 = insertelement <4 x i16> %tmp6, i16 %tmp7, i32 3
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ret <4 x i16> %tmp8
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}
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define i32 @test_varidx_extract_v2s32(<2 x i32> %x, i32 %idx) {
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; CHECK-SD-LABEL: test_varidx_extract_v2s32:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: sub sp, sp, #16
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; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
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; CHECK-SD-NEXT: add x8, sp, #8
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; CHECK-SD-NEXT: // kill: def $w0 killed $w0 def $x0
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; CHECK-SD-NEXT: str d0, [sp, #8]
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; CHECK-SD-NEXT: bfi x8, x0, #2, #1
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; CHECK-SD-NEXT: ldr w0, [x8]
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; CHECK-SD-NEXT: add sp, sp, #16
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test_varidx_extract_v2s32:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: sub sp, sp, #16
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; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
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; CHECK-GI-NEXT: mov w9, w0
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; CHECK-GI-NEXT: add x8, sp, #8
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; CHECK-GI-NEXT: str d0, [sp, #8]
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; CHECK-GI-NEXT: and x9, x9, #0x1
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; CHECK-GI-NEXT: ldr w0, [x8, x9, lsl #2]
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; CHECK-GI-NEXT: add sp, sp, #16
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; CHECK-GI-NEXT: ret
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%tmp = extractelement <2 x i32> %x, i32 %idx
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ret i32 %tmp
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}
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define <2 x i32> @test_varidx_extract_v4s32(<4 x i32> %x, i32 %idx) {
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; CHECK-SD-LABEL: test_varidx_extract_v4s32:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: sub sp, sp, #16
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; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
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; CHECK-SD-NEXT: mov x8, sp
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; CHECK-SD-NEXT: // kill: def $w0 killed $w0 def $x0
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; CHECK-SD-NEXT: str q0, [sp]
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; CHECK-SD-NEXT: bfi x8, x0, #2, #2
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; CHECK-SD-NEXT: ldr s1, [x8]
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; CHECK-SD-NEXT: mov v1.s[1], v0.s[1]
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; CHECK-SD-NEXT: fmov d0, d1
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; CHECK-SD-NEXT: add sp, sp, #16
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test_varidx_extract_v4s32:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: sub sp, sp, #16
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; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
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; CHECK-GI-NEXT: mov w9, w0
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; CHECK-GI-NEXT: mov x8, sp
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; CHECK-GI-NEXT: str q0, [sp]
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; CHECK-GI-NEXT: and x9, x9, #0x3
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; CHECK-GI-NEXT: ldr s1, [x8, x9, lsl #2]
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; CHECK-GI-NEXT: mov v1.s[1], v0.s[1]
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; CHECK-GI-NEXT: fmov d0, d1
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; CHECK-GI-NEXT: add sp, sp, #16
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; CHECK-GI-NEXT: ret
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%tmp = extractelement <4 x i32> %x, i32 %idx
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%tmp2 = insertelement <2 x i32> undef, i32 %tmp, i32 0
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%tmp3 = extractelement <4 x i32> %x, i32 1
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%tmp4 = insertelement <2 x i32> %tmp2, i32 %tmp3, i32 1
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ret <2 x i32> %tmp4
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}
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define i64 @test_varidx_extract_v2s64(<2 x i64> %x, i32 %idx) {
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; CHECK-SD-LABEL: test_varidx_extract_v2s64:
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; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: sub sp, sp, #16
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; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
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; CHECK-SD-NEXT: mov x8, sp
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; CHECK-SD-NEXT: // kill: def $w0 killed $w0 def $x0
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; CHECK-SD-NEXT: str q0, [sp]
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; CHECK-SD-NEXT: bfi x8, x0, #3, #1
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; CHECK-SD-NEXT: ldr x0, [x8]
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; CHECK-SD-NEXT: add sp, sp, #16
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; CHECK-SD-NEXT: ret
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;
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; CHECK-GI-LABEL: test_varidx_extract_v2s64:
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; CHECK-GI: // %bb.0:
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; CHECK-GI-NEXT: sub sp, sp, #16
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; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
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; CHECK-GI-NEXT: mov w9, w0
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; CHECK-GI-NEXT: mov x8, sp
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; CHECK-GI-NEXT: str q0, [sp]
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; CHECK-GI-NEXT: and x9, x9, #0x1
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; CHECK-GI-NEXT: ldr x0, [x8, x9, lsl #3]
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; CHECK-GI-NEXT: add sp, sp, #16
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; CHECK-GI-NEXT: ret
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%tmp = extractelement <2 x i64> %x, i32 %idx
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ret i64 %tmp
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}
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define ptr @test_varidx_extract_v2p0(<2 x ptr> %x, i32 %idx) {
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; CHECK-SD-LABEL: test_varidx_extract_v2p0:
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|
; CHECK-SD: // %bb.0:
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; CHECK-SD-NEXT: sub sp, sp, #16
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|
; CHECK-SD-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-SD-NEXT: mov x8, sp
|
|
; CHECK-SD-NEXT: // kill: def $w0 killed $w0 def $x0
|
|
; CHECK-SD-NEXT: str q0, [sp]
|
|
; CHECK-SD-NEXT: bfi x8, x0, #3, #1
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; CHECK-SD-NEXT: ldr x0, [x8]
|
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; CHECK-SD-NEXT: add sp, sp, #16
|
|
; CHECK-SD-NEXT: ret
|
|
;
|
|
; CHECK-GI-LABEL: test_varidx_extract_v2p0:
|
|
; CHECK-GI: // %bb.0:
|
|
; CHECK-GI-NEXT: sub sp, sp, #16
|
|
; CHECK-GI-NEXT: .cfi_def_cfa_offset 16
|
|
; CHECK-GI-NEXT: mov w9, w0
|
|
; CHECK-GI-NEXT: mov x8, sp
|
|
; CHECK-GI-NEXT: str q0, [sp]
|
|
; CHECK-GI-NEXT: and x9, x9, #0x1
|
|
; CHECK-GI-NEXT: ldr x0, [x8, x9, lsl #3]
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|
; CHECK-GI-NEXT: add sp, sp, #16
|
|
; CHECK-GI-NEXT: ret
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%tmp = extractelement <2 x ptr> %x, i32 %idx
|
|
ret ptr %tmp
|
|
}
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;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
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; CHECK: {{.*}}
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