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56 lines
1.6 KiB
YAML
56 lines
1.6 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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# RUN: llc -mtriple=aarch64-linux-gnu -run-pass peephole-opt -o - %s | FileCheck %s
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--- |
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define i32 @test01() nounwind {
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entry:
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%0 = select i1 true, i32 1, i32 0
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%1 = and i32 %0, 65535
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%2 = icmp sgt i32 %1, 0
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br i1 %2, label %if.then, label %if.end
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if.then: ; preds = %entry
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ret i32 1
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if.end: ; preds = %entry
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ret i32 0
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}
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...
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---
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name: test01
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registers:
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- { id: 0, class: gpr32 }
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- { id: 1, class: gpr32common }
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body: |
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; CHECK-LABEL: name: test01
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; CHECK: bb.0.entry:
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; CHECK-NEXT: successors: %bb.2(0x40000000), %bb.1(0x40000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[MOVi32imm:%[0-9]+]]:gpr32 = MOVi32imm 1
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; CHECK-NEXT: [[ANDSWri:%[0-9]+]]:gpr32common = ANDSWri killed [[ANDSWri]], 15, implicit-def $nzcv
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; CHECK-NEXT: Bcc 12, %bb.2, implicit $nzcv
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1.if.then:
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; CHECK-NEXT: $w0 = MOVi32imm 1
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.2.if.end:
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; CHECK-NEXT: $w0 = MOVi32imm 0
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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bb.0.entry:
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successors: %bb.2.if.end, %bb.1.if.then
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%0 = MOVi32imm 1
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%1 = ANDWri killed %1, 15
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$wzr = SUBSWri killed %1, 0, 0, implicit-def $nzcv
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Bcc 12, %bb.2.if.end, implicit $nzcv
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bb.1.if.then:
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$w0 = MOVi32imm 1
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RET_ReallyLR implicit $w0
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bb.2.if.end:
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$w0 = MOVi32imm 0
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RET_ReallyLR implicit $w0
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...
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