derek.holloway
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77 lines
2.5 KiB
LLVM
77 lines
2.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple | FileCheck %s
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; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple -global-isel | FileCheck %s
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define <8 x i8> @cls_8b(ptr %A) nounwind {
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; CHECK-LABEL: cls_8b:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldr d0, [x0]
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; CHECK-NEXT: cls.8b v0, v0
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; CHECK-NEXT: ret
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%tmp1 = load <8 x i8>, ptr %A
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%tmp3 = call <8 x i8> @llvm.aarch64.neon.cls.v8i8(<8 x i8> %tmp1)
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ret <8 x i8> %tmp3
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}
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define <16 x i8> @cls_16b(ptr %A) nounwind {
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; CHECK-LABEL: cls_16b:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldr q0, [x0]
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; CHECK-NEXT: cls.16b v0, v0
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; CHECK-NEXT: ret
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%tmp1 = load <16 x i8>, ptr %A
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%tmp3 = call <16 x i8> @llvm.aarch64.neon.cls.v16i8(<16 x i8> %tmp1)
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ret <16 x i8> %tmp3
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}
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define <4 x i16> @cls_4h(ptr %A) nounwind {
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; CHECK-LABEL: cls_4h:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldr d0, [x0]
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; CHECK-NEXT: cls.4h v0, v0
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; CHECK-NEXT: ret
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%tmp1 = load <4 x i16>, ptr %A
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%tmp3 = call <4 x i16> @llvm.aarch64.neon.cls.v4i16(<4 x i16> %tmp1)
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ret <4 x i16> %tmp3
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}
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define <8 x i16> @cls_8h(ptr %A) nounwind {
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; CHECK-LABEL: cls_8h:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldr q0, [x0]
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; CHECK-NEXT: cls.8h v0, v0
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; CHECK-NEXT: ret
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%tmp1 = load <8 x i16>, ptr %A
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%tmp3 = call <8 x i16> @llvm.aarch64.neon.cls.v8i16(<8 x i16> %tmp1)
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ret <8 x i16> %tmp3
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}
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define <2 x i32> @cls_2s(ptr %A) nounwind {
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; CHECK-LABEL: cls_2s:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldr d0, [x0]
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; CHECK-NEXT: cls.2s v0, v0
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; CHECK-NEXT: ret
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%tmp1 = load <2 x i32>, ptr %A
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%tmp3 = call <2 x i32> @llvm.aarch64.neon.cls.v2i32(<2 x i32> %tmp1)
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ret <2 x i32> %tmp3
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}
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define <4 x i32> @cls_4s(ptr %A) nounwind {
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; CHECK-LABEL: cls_4s:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ldr q0, [x0]
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; CHECK-NEXT: cls.4s v0, v0
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; CHECK-NEXT: ret
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%tmp1 = load <4 x i32>, ptr %A
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%tmp3 = call <4 x i32> @llvm.aarch64.neon.cls.v4i32(<4 x i32> %tmp1)
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ret <4 x i32> %tmp3
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}
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declare <8 x i8> @llvm.aarch64.neon.cls.v8i8(<8 x i8>) nounwind readnone
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declare <16 x i8> @llvm.aarch64.neon.cls.v16i8(<16 x i8>) nounwind readnone
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declare <4 x i16> @llvm.aarch64.neon.cls.v4i16(<4 x i16>) nounwind readnone
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declare <8 x i16> @llvm.aarch64.neon.cls.v8i16(<8 x i16>) nounwind readnone
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declare <2 x i32> @llvm.aarch64.neon.cls.v2i32(<2 x i32>) nounwind readnone
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declare <4 x i32> @llvm.aarch64.neon.cls.v4i32(<4 x i32>) nounwind readnone
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