TheRock/compiler/amd-llvm/llvm/test/CodeGen/AArch64/arm64-vselect.ll

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=arm64-eabi -aarch64-neon-syntax=apple | FileCheck %s

%T0_63 = type <4 x i16>
%T1_63 = type <4 x i32>
%T2_63 = type <4 x i1>
define void @func63(ptr %out, %T0_63 %v0, %T0_63 %v1, %T1_63 %v2, %T1_63 %v3) {
; CHECK-LABEL: func63:
; CHECK:       // %bb.0:
; CHECK-NEXT:    cmeq.4h v0, v0, v1
; CHECK-NEXT:    sshll.4s v0, v0, #0
; CHECK-NEXT:    bsl.16b v0, v2, v3
; CHECK-NEXT:    str q0, [x0]
; CHECK-NEXT:    ret
  %cond = icmp eq %T0_63 %v0, %v1
  %r = select %T2_63 %cond, %T1_63 %v2, %T1_63 %v3
  store %T1_63 %r, ptr %out
  ret void
}