derek.holloway
7502bf64a4
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98 lines
4.5 KiB
LLVM
98 lines
4.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=arm64ec-pc-windows-msvc -arm64ec-generate-thunks=false < %s | FileCheck %s
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; Make sure we're reserving all the registers that are supposed to be
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; reserved. Integer regs x13, x15, x23, x24, x28. Float regs v16-v31.
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; We confirm this by ensuring that we spill if and only if none of the
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; unreserved registers are available.
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define i32 @no_int_regs(i32 %x) nounwind {
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; CHECK-LABEL: no_int_regs:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: stp x19, x20, [sp, #-80]! // 16-byte Folded Spill
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; CHECK-NEXT: stp x21, x22, [sp, #16] // 16-byte Folded Spill
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; CHECK-NEXT: stp x25, x26, [sp, #32] // 16-byte Folded Spill
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; CHECK-NEXT: str x27, [sp, #48] // 8-byte Spill
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; CHECK-NEXT: stp x29, x30, [sp, #56] // 16-byte Folded Spill
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; CHECK-NEXT: str w0, [sp, #76] // 4-byte Spill
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; CHECK-NEXT: //APP
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; CHECK-NEXT: //NO_APP
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; CHECK-NEXT: ldp x29, x30, [sp, #56] // 16-byte Folded Reload
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; CHECK-NEXT: ldr w0, [sp, #76] // 4-byte Reload
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; CHECK-NEXT: ldp x25, x26, [sp, #32] // 16-byte Folded Reload
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; CHECK-NEXT: ldr x27, [sp, #48] // 8-byte Reload
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; CHECK-NEXT: ldp x21, x22, [sp, #16] // 16-byte Folded Reload
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; CHECK-NEXT: ldp x19, x20, [sp], #80 // 16-byte Folded Reload
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; CHECK-NEXT: ret
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entry:
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tail call void asm sideeffect "", "~{x0},~{x1},~{x2},~{x3},~{x4},~{x5},~{x6},~{x7},~{x8},~{x9},~{x10},~{x11},~{x12},~{x15},~{x16},~{x17},~{x19},~{x20},~{x21},~{x22},~{x25},~{x26},~{x27},~{fp},~{lr}"()
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ret i32 %x
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}
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define i32 @one_int_reg(i32 %x) nounwind {
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; CHECK-LABEL: one_int_reg:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: stp x19, x20, [sp, #-80]! // 16-byte Folded Spill
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; CHECK-NEXT: stp x21, x22, [sp, #16] // 16-byte Folded Spill
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; CHECK-NEXT: stp x25, x26, [sp, #32] // 16-byte Folded Spill
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; CHECK-NEXT: str x27, [sp, #48] // 8-byte Spill
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; CHECK-NEXT: stp x29, x30, [sp, #56] // 16-byte Folded Spill
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; CHECK-NEXT: mov w30, w0
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; CHECK-NEXT: //APP
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; CHECK-NEXT: //NO_APP
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; CHECK-NEXT: mov w0, w30
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; CHECK-NEXT: ldp x29, x30, [sp, #56] // 16-byte Folded Reload
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; CHECK-NEXT: ldp x25, x26, [sp, #32] // 16-byte Folded Reload
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; CHECK-NEXT: ldr x27, [sp, #48] // 8-byte Reload
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; CHECK-NEXT: ldp x21, x22, [sp, #16] // 16-byte Folded Reload
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; CHECK-NEXT: ldp x19, x20, [sp], #80 // 16-byte Folded Reload
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; CHECK-NEXT: ret
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entry:
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tail call void asm sideeffect "", "~{x0},~{x1},~{x2},~{x3},~{x4},~{x5},~{x6},~{x7},~{x8},~{x9},~{x10},~{x11},~{x12},~{x15},~{x16},~{x17},~{x19},~{x20},~{x21},~{x22},~{x25},~{x26},~{x27},~{fp}"()
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ret i32 %x
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}
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define float @no_float_regs(float %x) nounwind {
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; CHECK-LABEL: no_float_regs:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: sub sp, sp, #80
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; CHECK-NEXT: stp d8, d9, [sp, #16] // 16-byte Folded Spill
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; CHECK-NEXT: stp d10, d11, [sp, #32] // 16-byte Folded Spill
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; CHECK-NEXT: stp d12, d13, [sp, #48] // 16-byte Folded Spill
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; CHECK-NEXT: stp d14, d15, [sp, #64] // 16-byte Folded Spill
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; CHECK-NEXT: str s0, [sp, #12] // 4-byte Spill
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; CHECK-NEXT: //APP
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; CHECK-NEXT: //NO_APP
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; CHECK-NEXT: ldp d14, d15, [sp, #64] // 16-byte Folded Reload
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; CHECK-NEXT: ldr s0, [sp, #12] // 4-byte Reload
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; CHECK-NEXT: ldp d12, d13, [sp, #48] // 16-byte Folded Reload
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; CHECK-NEXT: ldp d10, d11, [sp, #32] // 16-byte Folded Reload
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; CHECK-NEXT: ldp d8, d9, [sp, #16] // 16-byte Folded Reload
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; CHECK-NEXT: add sp, sp, #80
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; CHECK-NEXT: ret
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entry:
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tail call void asm sideeffect "", "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9},~{v10},~{v11},~{v12},~{v13},~{v14},~{v15}"()
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ret float %x
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}
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define float @one_float_reg(float %x) nounwind {
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; CHECK-LABEL: one_float_reg:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: stp d8, d9, [sp, #-64]! // 16-byte Folded Spill
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; CHECK-NEXT: stp d14, d15, [sp, #48] // 16-byte Folded Spill
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; CHECK-NEXT: fmov s15, s0
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; CHECK-NEXT: stp d10, d11, [sp, #16] // 16-byte Folded Spill
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; CHECK-NEXT: stp d12, d13, [sp, #32] // 16-byte Folded Spill
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; CHECK-NEXT: //APP
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; CHECK-NEXT: //NO_APP
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; CHECK-NEXT: ldp d12, d13, [sp, #32] // 16-byte Folded Reload
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; CHECK-NEXT: fmov s0, s15
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; CHECK-NEXT: ldp d14, d15, [sp, #48] // 16-byte Folded Reload
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; CHECK-NEXT: ldp d10, d11, [sp, #16] // 16-byte Folded Reload
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; CHECK-NEXT: ldp d8, d9, [sp], #64 // 16-byte Folded Reload
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; CHECK-NEXT: ret
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entry:
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tail call void asm sideeffect "", "~{v0},~{v1},~{v2},~{v3},~{v4},~{v5},~{v6},~{v7},~{v8},~{v9},~{v10},~{v11},~{v12},~{v13},~{v14}"()
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ret float %x
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}
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