derek.holloway
7502bf64a4
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36 lines
1.1 KiB
LLVM
36 lines
1.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-apple-ios7.0 -disable-block-placement -aarch64-tbz-offset-bits=4 -o - %s | FileCheck %s
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define i32 @test_asm_length(i32 %in) {
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; It would be more natural to use just one "tbnz %false" here, but if the
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; number of instructions in the asm is counted reasonably, that block is out
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; of the limited range we gave tbz. So branch relaxation has to invert the
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; condition.
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; CHECK-LABEL: test_asm_length:
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; CHECK: ; %bb.0:
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; CHECK-NEXT: tbz w0, #0, LBB0_2
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; CHECK-NEXT: ; %bb.1:
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; CHECK-NEXT: mov w0, wzr
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; CHECK-NEXT: ret
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; CHECK-NEXT: LBB0_2: ; %true
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; CHECK-NEXT: mov w0, #4
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; CHECK-NEXT: ; InlineAsm Start
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: nop
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; CHECK-NEXT: ; InlineAsm End
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; CHECK-NEXT: ret
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%val = and i32 %in, 1
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%tst = icmp eq i32 %val, 0
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br i1 %tst, label %true, label %false
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true:
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call void asm sideeffect "nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop\0A\09nop", ""()
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ret i32 4
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false:
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ret i32 0
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}
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