derek.holloway
7502bf64a4
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82 lines
3.3 KiB
LLVM
82 lines
3.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; RUN: llc < %s | FileCheck %s --check-prefixes=CHECK-EXPAND
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; RUN: llc -mattr=+fp16fml < %s | FileCheck %s --check-prefixes=CHECK-FMLAL
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; RUN: llc -mattr=+f16f32dot < %s | FileCheck %s --check-prefixes=CHECK-FDOT
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; RUN: llc -mattr=+f16f32dot,+fp16fml < %s | FileCheck %s --check-prefixes=CHECK-FDOT
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; RUN: llc -mattr=+f16f32dot,+sve2 < %s | FileCheck %s --check-prefixes=CHECK-FDOT
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; RUN: llc -mattr=+f16f32dot,+sme -force-streaming < %s | FileCheck %s --check-prefixes=CHECK-SVE-FMLALBT
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target triple = "aarch64-linux-gnu"
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define <4 x float> @fixed_fdot_wide(<4 x float> %acc, <8 x half> %a, <8 x half> %b) {
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; CHECK-EXPAND-LABEL: fixed_fdot_wide:
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; CHECK-EXPAND: // %bb.0: // %entry
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; CHECK-EXPAND-NEXT: fcvtl v3.4s, v1.4h
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; CHECK-EXPAND-NEXT: fcvtl v4.4s, v2.4h
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; CHECK-EXPAND-NEXT: fcvtl2 v1.4s, v1.8h
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; CHECK-EXPAND-NEXT: fcvtl2 v2.4s, v2.8h
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; CHECK-EXPAND-NEXT: fmul v3.4s, v3.4s, v4.4s
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; CHECK-EXPAND-NEXT: fmul v1.4s, v1.4s, v2.4s
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; CHECK-EXPAND-NEXT: fadd v0.4s, v0.4s, v3.4s
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; CHECK-EXPAND-NEXT: fadd v0.4s, v0.4s, v1.4s
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; CHECK-EXPAND-NEXT: ret
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;
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; CHECK-FMLAL-LABEL: fixed_fdot_wide:
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; CHECK-FMLAL: // %bb.0: // %entry
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; CHECK-FMLAL-NEXT: fmlal v0.4s, v1.4h, v2.4h
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; CHECK-FMLAL-NEXT: fmlal2 v0.4s, v1.4h, v2.4h
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; CHECK-FMLAL-NEXT: ret
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;
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; CHECK-FDOT-LABEL: fixed_fdot_wide:
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; CHECK-FDOT: // %bb.0: // %entry
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; CHECK-FDOT-NEXT: fdot v0.4s, v1.8h, v2.8h
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; CHECK-FDOT-NEXT: ret
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;
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; CHECK-SVE-FMLALBT-LABEL: fixed_fdot_wide:
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; CHECK-SVE-FMLALBT: // %bb.0: // %entry
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; CHECK-SVE-FMLALBT-NEXT: fmlalb z0.s, z1.h, z2.h
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; CHECK-SVE-FMLALBT-NEXT: fmlalt z0.s, z1.h, z2.h
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; CHECK-SVE-FMLALBT-NEXT: ret
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entry:
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%a.wide = fpext <8 x half> %a to <8 x float>
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%b.wide = fpext <8 x half> %b to <8 x float>
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%mult = fmul <8 x float> %a.wide, %b.wide
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%partial.reduce = call <4 x float> @llvm.vector.partial.reduce.fadd(<4 x float> %acc, <8 x float> %mult)
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ret <4 x float> %partial.reduce
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}
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define <2 x float> @fixed_fdot(<2 x float> %acc, <4 x half> %a, <4 x half> %b) {
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; CHECK-EXPAND-LABEL: fixed_fdot:
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; CHECK-EXPAND: // %bb.0: // %entry
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; CHECK-EXPAND-NEXT: fcvtl v1.4s, v1.4h
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; CHECK-EXPAND-NEXT: fcvtl v2.4s, v2.4h
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; CHECK-EXPAND-NEXT: fmul v1.4s, v1.4s, v2.4s
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; CHECK-EXPAND-NEXT: fadd v0.2s, v0.2s, v1.2s
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; CHECK-EXPAND-NEXT: mov d1, v1.d[1]
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; CHECK-EXPAND-NEXT: fadd v0.2s, v1.2s, v0.2s
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; CHECK-EXPAND-NEXT: ret
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;
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; CHECK-FMLAL-LABEL: fixed_fdot:
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; CHECK-FMLAL: // %bb.0: // %entry
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; CHECK-FMLAL-NEXT: fmlal v0.2s, v1.2h, v2.2h
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; CHECK-FMLAL-NEXT: fmlal2 v0.2s, v1.2h, v2.2h
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; CHECK-FMLAL-NEXT: ret
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;
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; CHECK-FDOT-LABEL: fixed_fdot:
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; CHECK-FDOT: // %bb.0: // %entry
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; CHECK-FDOT-NEXT: fdot v0.2s, v1.4h, v2.4h
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; CHECK-FDOT-NEXT: ret
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;
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; CHECK-SVE-FMLALBT-LABEL: fixed_fdot:
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; CHECK-SVE-FMLALBT: // %bb.0: // %entry
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; CHECK-SVE-FMLALBT-NEXT: fmlalb z0.s, z1.h, z2.h
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; CHECK-SVE-FMLALBT-NEXT: fmlalt z0.s, z1.h, z2.h
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; CHECK-SVE-FMLALBT-NEXT: ret
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entry:
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%a.wide = fpext <4 x half> %a to <4 x float>
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%b.wide = fpext <4 x half> %b to <4 x float>
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%mult = fmul <4 x float> %a.wide, %b.wide
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%partial.reduce = call <2 x float> @llvm.vector.partial.reduce.fadd(<2 x float> %acc, <4 x float> %mult)
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ret <2 x float> %partial.reduce
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}
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