derek.holloway
7502bf64a4
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329 lines
10 KiB
LLVM
329 lines
10 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc -mtriple=aarch64 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-NOFP16,CHECK-NOFP16-SD
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; RUN: llc -mtriple=aarch64 -mattr=+fullfp16 -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-FP16,CHECK-FP16-SD
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; RUN: llc -mtriple=aarch64 -global-isel -global-isel-abort=2 -verify-machineinstrs %s -o - -global-isel-abort=2 | FileCheck %s --check-prefixes=CHECK,CHECK-NOFP16,CHECK-NOFP16-GI
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; RUN: llc -mtriple=aarch64 -mattr=+fullfp16 -global-isel -global-isel-abort=2 -verify-machineinstrs %s -o - -global-isel-abort=2 | FileCheck %s --check-prefixes=CHECK,CHECK-FP16,CHECK-FP16-GI
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define double @fneg_f64(double %a) {
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; CHECK-LABEL: fneg_f64:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fneg d0, d0
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; CHECK-NEXT: ret
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entry:
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%c = fneg double %a
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ret double %c
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}
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define float @fneg_f32(float %a) {
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; CHECK-LABEL: fneg_f32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fneg s0, s0
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; CHECK-NEXT: ret
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entry:
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%c = fneg float %a
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ret float %c
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}
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define half @fneg_f16(half %a) {
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; CHECK-NOFP16-SD-LABEL: fneg_f16:
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; CHECK-NOFP16-SD: // %bb.0: // %entry
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; CHECK-NOFP16-SD-NEXT: // kill: def $h0 killed $h0 def $s0
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; CHECK-NOFP16-SD-NEXT: fmov w8, s0
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; CHECK-NOFP16-SD-NEXT: eor w8, w8, #0x8000
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; CHECK-NOFP16-SD-NEXT: fmov s0, w8
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; CHECK-NOFP16-SD-NEXT: // kill: def $h0 killed $h0 killed $s0
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; CHECK-NOFP16-SD-NEXT: ret
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;
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; CHECK-FP16-LABEL: fneg_f16:
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; CHECK-FP16: // %bb.0: // %entry
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; CHECK-FP16-NEXT: fneg h0, h0
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; CHECK-FP16-NEXT: ret
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;
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; CHECK-NOFP16-GI-LABEL: fneg_f16:
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; CHECK-NOFP16-GI: // %bb.0: // %entry
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; CHECK-NOFP16-GI-NEXT: // kill: def $h0 killed $h0 def $s0
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; CHECK-NOFP16-GI-NEXT: fmov w8, s0
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; CHECK-NOFP16-GI-NEXT: eor w8, w8, #0xffff8000
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; CHECK-NOFP16-GI-NEXT: fmov s0, w8
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; CHECK-NOFP16-GI-NEXT: // kill: def $h0 killed $h0 killed $s0
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; CHECK-NOFP16-GI-NEXT: ret
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entry:
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%c = fneg half %a
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ret half %c
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}
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define bfloat @fneg_bf16(bfloat %a) {
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; CHECK-NOFP16-SD-LABEL: fneg_bf16:
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; CHECK-NOFP16-SD: // %bb.0: // %entry
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; CHECK-NOFP16-SD-NEXT: // kill: def $h0 killed $h0 def $s0
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; CHECK-NOFP16-SD-NEXT: fmov w8, s0
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; CHECK-NOFP16-SD-NEXT: eor w8, w8, #0x8000
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; CHECK-NOFP16-SD-NEXT: fmov s0, w8
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; CHECK-NOFP16-SD-NEXT: // kill: def $h0 killed $h0 killed $s0
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; CHECK-NOFP16-SD-NEXT: ret
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;
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; CHECK-FP16-LABEL: fneg_bf16:
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; CHECK-FP16: // %bb.0: // %entry
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; CHECK-FP16-NEXT: fneg h0, h0
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; CHECK-FP16-NEXT: ret
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;
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; CHECK-NOFP16-GI-LABEL: fneg_bf16:
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; CHECK-NOFP16-GI: // %bb.0: // %entry
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; CHECK-NOFP16-GI-NEXT: // kill: def $h0 killed $h0 def $s0
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; CHECK-NOFP16-GI-NEXT: fmov w8, s0
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; CHECK-NOFP16-GI-NEXT: eor w8, w8, #0xffff8000
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; CHECK-NOFP16-GI-NEXT: fmov s0, w8
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; CHECK-NOFP16-GI-NEXT: // kill: def $h0 killed $h0 killed $s0
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; CHECK-NOFP16-GI-NEXT: ret
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entry:
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%c = fneg bfloat %a
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ret bfloat %c
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}
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define <2 x double> @fneg_v2f64(<2 x double> %a) {
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; CHECK-LABEL: fneg_v2f64:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fneg v0.2d, v0.2d
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; CHECK-NEXT: ret
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entry:
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%c = fneg <2 x double> %a
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ret <2 x double> %c
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}
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define <3 x double> @fneg_v3f64(<3 x double> %a) {
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; CHECK-NOFP16-SD-LABEL: fneg_v3f64:
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; CHECK-NOFP16-SD: // %bb.0: // %entry
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; CHECK-NOFP16-SD-NEXT: // kill: def $d0 killed $d0 def $q0
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; CHECK-NOFP16-SD-NEXT: // kill: def $d1 killed $d1 def $q1
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; CHECK-NOFP16-SD-NEXT: // kill: def $d2 killed $d2 def $q2
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; CHECK-NOFP16-SD-NEXT: mov v0.d[1], v1.d[0]
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; CHECK-NOFP16-SD-NEXT: fneg v2.2d, v2.2d
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; CHECK-NOFP16-SD-NEXT: // kill: def $d2 killed $d2 killed $q2
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; CHECK-NOFP16-SD-NEXT: fneg v0.2d, v0.2d
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; CHECK-NOFP16-SD-NEXT: mov d1, v0.d[1]
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; CHECK-NOFP16-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
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; CHECK-NOFP16-SD-NEXT: ret
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;
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; CHECK-FP16-SD-LABEL: fneg_v3f64:
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; CHECK-FP16-SD: // %bb.0: // %entry
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; CHECK-FP16-SD-NEXT: // kill: def $d0 killed $d0 def $q0
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; CHECK-FP16-SD-NEXT: // kill: def $d1 killed $d1 def $q1
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; CHECK-FP16-SD-NEXT: // kill: def $d2 killed $d2 def $q2
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; CHECK-FP16-SD-NEXT: mov v0.d[1], v1.d[0]
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; CHECK-FP16-SD-NEXT: fneg v2.2d, v2.2d
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; CHECK-FP16-SD-NEXT: // kill: def $d2 killed $d2 killed $q2
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; CHECK-FP16-SD-NEXT: fneg v0.2d, v0.2d
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; CHECK-FP16-SD-NEXT: mov d1, v0.d[1]
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; CHECK-FP16-SD-NEXT: // kill: def $d0 killed $d0 killed $q0
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; CHECK-FP16-SD-NEXT: ret
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;
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; CHECK-NOFP16-GI-LABEL: fneg_v3f64:
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; CHECK-NOFP16-GI: // %bb.0: // %entry
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; CHECK-NOFP16-GI-NEXT: // kill: def $d0 killed $d0 def $q0
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; CHECK-NOFP16-GI-NEXT: // kill: def $d1 killed $d1 def $q1
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; CHECK-NOFP16-GI-NEXT: fneg d2, d2
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; CHECK-NOFP16-GI-NEXT: mov v0.d[1], v1.d[0]
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; CHECK-NOFP16-GI-NEXT: fneg v0.2d, v0.2d
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; CHECK-NOFP16-GI-NEXT: mov d1, v0.d[1]
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; CHECK-NOFP16-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
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; CHECK-NOFP16-GI-NEXT: ret
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;
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; CHECK-FP16-GI-LABEL: fneg_v3f64:
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; CHECK-FP16-GI: // %bb.0: // %entry
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; CHECK-FP16-GI-NEXT: // kill: def $d0 killed $d0 def $q0
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; CHECK-FP16-GI-NEXT: // kill: def $d1 killed $d1 def $q1
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; CHECK-FP16-GI-NEXT: fneg d2, d2
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; CHECK-FP16-GI-NEXT: mov v0.d[1], v1.d[0]
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; CHECK-FP16-GI-NEXT: fneg v0.2d, v0.2d
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; CHECK-FP16-GI-NEXT: mov d1, v0.d[1]
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; CHECK-FP16-GI-NEXT: // kill: def $d0 killed $d0 killed $q0
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; CHECK-FP16-GI-NEXT: ret
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entry:
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%c = fneg <3 x double> %a
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ret <3 x double> %c
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}
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define <4 x double> @fneg_v4f64(<4 x double> %a) {
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; CHECK-LABEL: fneg_v4f64:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fneg v0.2d, v0.2d
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; CHECK-NEXT: fneg v1.2d, v1.2d
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; CHECK-NEXT: ret
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entry:
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%c = fneg <4 x double> %a
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ret <4 x double> %c
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}
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define <2 x float> @fneg_v2f32(<2 x float> %a) {
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; CHECK-LABEL: fneg_v2f32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fneg v0.2s, v0.2s
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; CHECK-NEXT: ret
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entry:
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%c = fneg <2 x float> %a
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ret <2 x float> %c
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}
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define <3 x float> @fneg_v3f32(<3 x float> %a) {
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; CHECK-LABEL: fneg_v3f32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fneg v0.4s, v0.4s
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; CHECK-NEXT: ret
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entry:
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%c = fneg <3 x float> %a
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ret <3 x float> %c
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}
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define <4 x float> @fneg_v4f32(<4 x float> %a) {
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; CHECK-LABEL: fneg_v4f32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fneg v0.4s, v0.4s
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; CHECK-NEXT: ret
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entry:
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%c = fneg <4 x float> %a
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ret <4 x float> %c
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}
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define <8 x float> @fneg_v8f32(<8 x float> %a) {
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; CHECK-LABEL: fneg_v8f32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fneg v0.4s, v0.4s
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; CHECK-NEXT: fneg v1.4s, v1.4s
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; CHECK-NEXT: ret
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entry:
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%c = fneg <8 x float> %a
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ret <8 x float> %c
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}
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define <7 x half> @fneg_v7f16(<7 x half> %a) {
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; CHECK-NOFP16-LABEL: fneg_v7f16:
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; CHECK-NOFP16: // %bb.0: // %entry
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; CHECK-NOFP16-NEXT: movi v1.8h, #128, lsl #8
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; CHECK-NOFP16-NEXT: eor v0.16b, v0.16b, v1.16b
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; CHECK-NOFP16-NEXT: ret
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;
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; CHECK-FP16-LABEL: fneg_v7f16:
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; CHECK-FP16: // %bb.0: // %entry
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; CHECK-FP16-NEXT: fneg v0.8h, v0.8h
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; CHECK-FP16-NEXT: ret
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entry:
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%c = fneg <7 x half> %a
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ret <7 x half> %c
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}
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define <4 x half> @fneg_v4f16(<4 x half> %a) {
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; CHECK-NOFP16-LABEL: fneg_v4f16:
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; CHECK-NOFP16: // %bb.0: // %entry
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; CHECK-NOFP16-NEXT: movi v1.4h, #128, lsl #8
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; CHECK-NOFP16-NEXT: eor v0.8b, v0.8b, v1.8b
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; CHECK-NOFP16-NEXT: ret
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;
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; CHECK-FP16-LABEL: fneg_v4f16:
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; CHECK-FP16: // %bb.0: // %entry
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; CHECK-FP16-NEXT: fneg v0.4h, v0.4h
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; CHECK-FP16-NEXT: ret
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entry:
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%c = fneg <4 x half> %a
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ret <4 x half> %c
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}
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define <8 x half> @fneg_v8f16(<8 x half> %a) {
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; CHECK-NOFP16-LABEL: fneg_v8f16:
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; CHECK-NOFP16: // %bb.0: // %entry
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; CHECK-NOFP16-NEXT: movi v1.8h, #128, lsl #8
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; CHECK-NOFP16-NEXT: eor v0.16b, v0.16b, v1.16b
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; CHECK-NOFP16-NEXT: ret
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;
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; CHECK-FP16-LABEL: fneg_v8f16:
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; CHECK-FP16: // %bb.0: // %entry
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; CHECK-FP16-NEXT: fneg v0.8h, v0.8h
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; CHECK-FP16-NEXT: ret
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entry:
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%c = fneg <8 x half> %a
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ret <8 x half> %c
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}
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define <16 x half> @fneg_v16f16(<16 x half> %a) {
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; CHECK-NOFP16-LABEL: fneg_v16f16:
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; CHECK-NOFP16: // %bb.0: // %entry
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; CHECK-NOFP16-NEXT: movi v2.8h, #128, lsl #8
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; CHECK-NOFP16-NEXT: eor v0.16b, v0.16b, v2.16b
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; CHECK-NOFP16-NEXT: eor v1.16b, v1.16b, v2.16b
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; CHECK-NOFP16-NEXT: ret
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;
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; CHECK-FP16-LABEL: fneg_v16f16:
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; CHECK-FP16: // %bb.0: // %entry
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; CHECK-FP16-NEXT: fneg v0.8h, v0.8h
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; CHECK-FP16-NEXT: fneg v1.8h, v1.8h
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; CHECK-FP16-NEXT: ret
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entry:
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%c = fneg <16 x half> %a
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ret <16 x half> %c
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}
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define <7 x bfloat> @fneg_v7bf16(<7 x bfloat> %a) {
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; CHECK-NOFP16-LABEL: fneg_v7bf16:
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; CHECK-NOFP16: // %bb.0: // %entry
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; CHECK-NOFP16-NEXT: movi v1.8h, #128, lsl #8
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; CHECK-NOFP16-NEXT: eor v0.16b, v0.16b, v1.16b
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; CHECK-NOFP16-NEXT: ret
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;
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; CHECK-FP16-LABEL: fneg_v7bf16:
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; CHECK-FP16: // %bb.0: // %entry
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; CHECK-FP16-NEXT: fneg v0.8h, v0.8h
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; CHECK-FP16-NEXT: ret
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entry:
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%c = fneg <7 x bfloat> %a
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ret <7 x bfloat> %c
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}
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define <4 x bfloat> @fneg_v4bf16(<4 x bfloat> %a) {
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; CHECK-NOFP16-LABEL: fneg_v4bf16:
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; CHECK-NOFP16: // %bb.0: // %entry
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; CHECK-NOFP16-NEXT: movi v1.4h, #128, lsl #8
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; CHECK-NOFP16-NEXT: eor v0.8b, v0.8b, v1.8b
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; CHECK-NOFP16-NEXT: ret
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;
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; CHECK-FP16-LABEL: fneg_v4bf16:
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; CHECK-FP16: // %bb.0: // %entry
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; CHECK-FP16-NEXT: fneg v0.4h, v0.4h
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; CHECK-FP16-NEXT: ret
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entry:
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%c = fneg <4 x bfloat> %a
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ret <4 x bfloat> %c
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}
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define <8 x bfloat> @fneg_v8bf16(<8 x bfloat> %a) {
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; CHECK-NOFP16-LABEL: fneg_v8bf16:
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; CHECK-NOFP16: // %bb.0: // %entry
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; CHECK-NOFP16-NEXT: movi v1.8h, #128, lsl #8
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; CHECK-NOFP16-NEXT: eor v0.16b, v0.16b, v1.16b
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; CHECK-NOFP16-NEXT: ret
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;
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; CHECK-FP16-LABEL: fneg_v8bf16:
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; CHECK-FP16: // %bb.0: // %entry
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; CHECK-FP16-NEXT: fneg v0.8h, v0.8h
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; CHECK-FP16-NEXT: ret
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entry:
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%c = fneg <8 x bfloat> %a
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ret <8 x bfloat> %c
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}
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define <16 x bfloat> @fneg_v16bf16(<16 x bfloat> %a) {
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; CHECK-NOFP16-LABEL: fneg_v16bf16:
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; CHECK-NOFP16: // %bb.0: // %entry
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; CHECK-NOFP16-NEXT: movi v2.8h, #128, lsl #8
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; CHECK-NOFP16-NEXT: eor v0.16b, v0.16b, v2.16b
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; CHECK-NOFP16-NEXT: eor v1.16b, v1.16b, v2.16b
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; CHECK-NOFP16-NEXT: ret
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;
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; CHECK-FP16-LABEL: fneg_v16bf16:
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; CHECK-FP16: // %bb.0: // %entry
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; CHECK-FP16-NEXT: fneg v0.8h, v0.8h
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; CHECK-FP16-NEXT: fneg v1.8h, v1.8h
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; CHECK-FP16-NEXT: ret
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entry:
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%c = fneg <16 x bfloat> %a
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ret <16 x bfloat> %c
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}
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