derek.holloway
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55 lines
1.5 KiB
LLVM
55 lines
1.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; RUN: llc < %s -mtriple=aarch64 -mattr=+neon | FileCheck %s --check-prefixes=CHECK,CHECK-SD
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; RUN: llc < %s -mtriple=aarch64 -mattr=+neon -global-isel | FileCheck %s --check-prefixes=CHECK,CHECK-GI
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define i64 @testmsxs(float %x) {
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; CHECK-LABEL: testmsxs:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: frintx s0, s0
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; CHECK-NEXT: fcvtzs w8, s0
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; CHECK-NEXT: sxtw x0, w8
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; CHECK-NEXT: ret
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entry:
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%0 = tail call i32 @llvm.lrint.i32.f32(float %x)
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%conv = sext i32 %0 to i64
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ret i64 %conv
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}
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define i32 @testmsws(float %x) {
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; CHECK-LABEL: testmsws:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: frintx s0, s0
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; CHECK-NEXT: fcvtzs w0, s0
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; CHECK-NEXT: ret
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entry:
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%0 = tail call i32 @llvm.lrint.i32.f32(float %x)
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ret i32 %0
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}
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define i64 @testmsxd(double %x) {
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; CHECK-LABEL: testmsxd:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: frintx d0, d0
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; CHECK-NEXT: fcvtzs w8, d0
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; CHECK-NEXT: sxtw x0, w8
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; CHECK-NEXT: ret
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entry:
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%0 = tail call i32 @llvm.lrint.i32.f64(double %x)
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%conv = sext i32 %0 to i64
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ret i64 %conv
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}
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define i32 @testmswd(double %x) {
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; CHECK-LABEL: testmswd:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: frintx d0, d0
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; CHECK-NEXT: fcvtzs w0, d0
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; CHECK-NEXT: ret
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entry:
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%0 = tail call i32 @llvm.lrint.i32.f64(double %x)
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ret i32 %0
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}
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;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
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; CHECK-GI: {{.*}}
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; CHECK-SD: {{.*}}
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