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TheRock/compiler/amd-llvm/llvm/test/CodeGen/AArch64/machine-cp-backward-uses.mir
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
# RUN: llc -mtriple=aarch64-none-linux-gnu -run-pass machine-cp -verify-machineinstrs -o - %s | FileCheck %s
# Normal case
---
name: test1
body: |
bb.0:
liveins: $w2
; CHECK-LABEL: name: test1
; CHECK: liveins: $w2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: renamable $w0 = MOVi32imm 5
; CHECK-NEXT: renamable $w3 = ADDWrr renamable $w0, killed renamable $w2
; CHECK-NEXT: RET_ReallyLR implicit killed $w0
renamable $w1 = MOVi32imm 5
renamable $w3 = ADDWrr renamable $w1, killed renamable $w2
renamable $w0 = COPY killed renamable $w1
RET_ReallyLR implicit killed $w0
...
# Not renamable use
---
name: test2
body: |
bb.0:
liveins: $w2
; CHECK-LABEL: name: test2
; CHECK: liveins: $w2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: renamable $w1 = MOVi32imm 5
; CHECK-NEXT: renamable $w3 = ADDWrr $w1, killed renamable $w2
; CHECK-NEXT: renamable $w0 = COPY killed renamable $w1
; CHECK-NEXT: RET_ReallyLR implicit killed $w0
renamable $w1 = MOVi32imm 5
renamable $w3 = ADDWrr $w1, killed renamable $w2
renamable $w0 = COPY killed renamable $w1
RET_ReallyLR implicit killed $w0
...
# Implicit use
---
name: test3
body: |
bb.0:
liveins: $w2
; CHECK-LABEL: name: test3
; CHECK: liveins: $w2
; CHECK-NEXT: {{ $}}
; CHECK-NEXT: renamable $w1 = MOVi32imm 5
; CHECK-NEXT: renamable $w3 = ADDWrr renamable $w1, killed renamable $w2, implicit $w1
; CHECK-NEXT: renamable $w0 = COPY killed renamable $w1
; CHECK-NEXT: RET_ReallyLR implicit killed $w0
renamable $w1 = MOVi32imm 5
renamable $w3 = ADDWrr renamable $w1, killed renamable $w2, implicit $w1
renamable $w0 = COPY killed renamable $w1
RET_ReallyLR implicit killed $w0
...