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TheRock/compiler/amd-llvm/llvm/test/CodeGen/AArch64/neon-mul-shl.ll
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derek.holloway 7502bf64a4
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Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

101 lines
2.9 KiB
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=aarch64 -mattr=+neon | FileCheck %s
define <2 x i64> @mul_v2i64_257(<2 x i64> %v) {
; CHECK-LABEL: mul_v2i64_257:
; CHECK: // %bb.0:
; CHECK-NEXT: shl v1.2d, v0.2d, #8
; CHECK-NEXT: add v0.2d, v1.2d, v0.2d
; CHECK-NEXT: ret
%mul = mul <2 x i64> %v, splat (i64 257)
ret <2 x i64> %mul
}
define <2 x i64> @mul_v2i64_255(<2 x i64> %v) {
; CHECK-LABEL: mul_v2i64_255:
; CHECK: // %bb.0:
; CHECK-NEXT: shl v1.2d, v0.2d, #8
; CHECK-NEXT: sub v0.2d, v1.2d, v0.2d
; CHECK-NEXT: ret
%mul = mul <2 x i64> %v, splat (i64 255)
ret <2 x i64> %mul
}
define <2 x i64> @mul_v2i64_9(<2 x i64> %v) {
; CHECK-LABEL: mul_v2i64_9:
; CHECK: // %bb.0:
; CHECK-NEXT: shl v1.2d, v0.2d, #3
; CHECK-NEXT: add v0.2d, v1.2d, v0.2d
; CHECK-NEXT: ret
%mul = mul <2 x i64> %v, splat (i64 9)
ret <2 x i64> %mul
}
define <2 x i64> @mul_v2i64_neg_33(<2 x i64> %v) {
; CHECK-LABEL: mul_v2i64_neg_33:
; CHECK: // %bb.0:
; CHECK-NEXT: shl v1.2d, v0.2d, #5
; CHECK-NEXT: add v0.2d, v1.2d, v0.2d
; CHECK-NEXT: neg v0.2d, v0.2d
; CHECK-NEXT: ret
%mul = mul <2 x i64> %v, splat (i64 -33)
ret <2 x i64> %mul
}
define <2 x i64> @mul_v2i64_neg_15(<2 x i64> %v) {
; CHECK-LABEL: mul_v2i64_neg_15:
; CHECK: // %bb.0:
; CHECK-NEXT: shl v1.2d, v0.2d, #4
; CHECK-NEXT: sub v0.2d, v0.2d, v1.2d
; CHECK-NEXT: ret
%mul = mul <2 x i64> %v, splat (i64 -15)
ret <2 x i64> %mul
}
define <2 x i64> @mul_v2i64_8800(<2 x i64> %v) {
; CHECK-LABEL: mul_v2i64_8800:
; CHECK: // %bb.0:
; CHECK-NEXT: shl v1.2d, v0.2d, #11
; CHECK-NEXT: shl v0.2d, v0.2d, #15
; CHECK-NEXT: add v0.2d, v0.2d, v1.2d
; CHECK-NEXT: ret
%mul = mul <2 x i64> %v, splat (i64 34816) ; 0x8800
ret <2 x i64> %mul
}
define <2 x i64> @mul_v2i64_f800(<2 x i64> %v) {
; CHECK-LABEL: mul_v2i64_f800:
; CHECK: // %bb.0:
; CHECK-NEXT: shl v1.2d, v0.2d, #11
; CHECK-NEXT: shl v0.2d, v0.2d, #16
; CHECK-NEXT: sub v0.2d, v0.2d, v1.2d
; CHECK-NEXT: ret
%mul = mul <2 x i64> %v, splat (i64 63488) ; 0xf800
ret <2 x i64> %mul
}
;; This should not be optimized as it doesn't lower to a mul
define <2 x i64> @mul_v2i64_256(<2 x i64> %v) {
; CHECK-LABEL: mul_v2i64_256:
; CHECK: // %bb.0:
; CHECK-NEXT: shl v0.2d, v0.2d, #8
; CHECK-NEXT: ret
%mul = mul <2 x i64> %v, splat (i64 256)
ret <2 x i64> %mul
}
;; This should not be optimized
define <2 x i64> @mul_v2i64_13_no_opt(<2 x i64> %v) {
; CHECK-LABEL: mul_v2i64_13_no_opt:
; CHECK: // %bb.0:
; CHECK-NEXT: fmov x10, d0
; CHECK-NEXT: mov w8, #13 // =0xd
; CHECK-NEXT: mov x9, v0.d[1]
; CHECK-NEXT: mul x10, x10, x8
; CHECK-NEXT: mul x8, x9, x8
; CHECK-NEXT: fmov d0, x10
; CHECK-NEXT: mov v0.d[1], x8
; CHECK-NEXT: ret
%mul = mul <2 x i64> %v, splat (i64 13)
ret <2 x i64> %mul
}