derek.holloway
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62 lines
2.8 KiB
YAML
62 lines
2.8 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -run-pass=aarch64-mi-peephole-opt -o - -mtriple=aarch64-unknown-linux -verify-machineinstrs %s | FileCheck %s
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# RUN: llc -passes=aarch64-mi-peephole-opt -o - -mtriple=aarch64-unknown-linux %s | FileCheck %s
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---
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name: remove_kill_flags
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $w0
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; CHECK-LABEL: name: remove_kill_flags
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; CHECK: liveins: $w0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[MOVIv2d_ns:%[0-9]+]]:fpr128 = MOVIv2d_ns 0
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; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY [[MOVIv2d_ns]].dsub
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; CHECK-NEXT: [[UQSHLv8i8_shift:%[0-9]+]]:fpr64 = UQSHLv8i8_shift killed [[COPY]], 1
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; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:fpr128 = SUBREG_TO_REG [[UQSHLv8i8_shift]], %subreg.dsub
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; CHECK-NEXT: [[TBLv8i8One:%[0-9]+]]:fpr64 = TBLv8i8One killed [[SUBREG_TO_REG]], [[UQSHLv8i8_shift]]
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; CHECK-NEXT: [[DEF:%[0-9]+]]:fpr128 = IMPLICIT_DEF
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; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF]], [[UQSHLv8i8_shift]], %subreg.dsub
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%0:fpr128 = MOVIv2d_ns 0
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%1:fpr64 = COPY %0.dsub:fpr128
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%2:fpr64 = UQSHLv8i8_shift killed %1:fpr64, 1
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%3:fpr64 = FMOVDr %2:fpr64
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%4:fpr128 = SUBREG_TO_REG killed %3:fpr64, %subreg.dsub
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%5:fpr64 = TBLv8i8One killed %4:fpr128, %2:fpr64
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%7:fpr128 = IMPLICIT_DEF
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%6:fpr128 = INSERT_SUBREG %7:fpr128, killed %2:fpr64, %subreg.dsub
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RET_ReallyLR implicit $w0
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...
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---
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name: remove_kill_flags2
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $w0
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; CHECK-LABEL: name: remove_kill_flags2
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; CHECK: liveins: $w0
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[MOVIv2d_ns:%[0-9]+]]:fpr128 = MOVIv2d_ns 0
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; CHECK-NEXT: [[COPY:%[0-9]+]]:fpr64 = COPY [[MOVIv2d_ns]].dsub
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; CHECK-NEXT: [[UQSHLv8i8_shift:%[0-9]+]]:fpr64 = UQSHLv8i8_shift killed [[COPY]], 1
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; CHECK-NEXT: [[SUBREG_TO_REG:%[0-9]+]]:fpr128 = SUBREG_TO_REG [[UQSHLv8i8_shift]], %subreg.dsub
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; CHECK-NEXT: [[DEF:%[0-9]+]]:fpr128 = IMPLICIT_DEF
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; CHECK-NEXT: [[INSERT_SUBREG:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF]], [[UQSHLv8i8_shift]], %subreg.dsub
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; CHECK-NEXT: [[DEF1:%[0-9]+]]:fpr128 = IMPLICIT_DEF
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; CHECK-NEXT: [[INSERT_SUBREG1:%[0-9]+]]:fpr128 = INSERT_SUBREG [[DEF1]], [[UQSHLv8i8_shift]], %subreg.dsub
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; CHECK-NEXT: RET_ReallyLR implicit $w0
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%0:fpr128 = MOVIv2d_ns 0
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%1:fpr64 = COPY %0.dsub:fpr128
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%2:fpr64 = UQSHLv8i8_shift killed %1:fpr64, 1
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%3:fpr64 = FMOVDr %2:fpr64
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%4:fpr128 = SUBREG_TO_REG %3:fpr64, %subreg.dsub
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%7:fpr128 = IMPLICIT_DEF
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%6:fpr128 = INSERT_SUBREG %7:fpr128, killed %2:fpr64, %subreg.dsub
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%9:fpr128 = IMPLICIT_DEF
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%8:fpr128 = INSERT_SUBREG %9:fpr128, killed %3:fpr64, %subreg.dsub
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RET_ReallyLR implicit $w0
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...
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