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68 lines
1.9 KiB
YAML
68 lines
1.9 KiB
YAML
# RUN: llc -mtriple=aarch64 -mattr=+sve -start-before=greedy -stop-after=virtregrewriter -debug-only=regalloc %s -o /dev/null 2>&1 | FileCheck %s --check-prefix=DBG
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# REQUIRES: asserts
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# Check that the register allocator gets hints to reuse registers of one of it's operands.
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---
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name: prioritize_movprfx_hints
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tracksRegLiveness: true
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isSSA: false
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noVRegs: false
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body: |
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bb.0.entry:
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liveins: $z0, $z1, $z2, $z3, $p0
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; DBG: Machine code for function prioritize_movprfx_hints
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;
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; DBG: selectOrSplit ZPR:%4
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; DBG-NEXT: hints: $z0 $z1{{$}}
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;
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; DBG: selectOrSplit ZPR:%5
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; DBG-NEXT: hints: $z2 $z3{{$}}
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;
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; DBG: [%0 -> $z3] ZPR
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; DBG: [%1 -> $z2] ZPR
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; DBG: [%2 -> $z1] ZPR
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; DBG: [%3 -> $z0] ZPR
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; DBG: [%4 -> $z0] ZPR
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; DBG: [%5 -> $z2] ZPR
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; DBG: [%6 -> $z0] ZPR
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%0:zpr = COPY $z3
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%1:zpr = COPY $z2
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%2:zpr = COPY $z1
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%3:zpr = COPY $z0
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%4:zpr = SDIV_ZPZZ_D_UNDEF $p0, %3:zpr, %2:zpr
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%5:zpr = MUL_ZPZZ_D_UNDEF $p0, %1:zpr, %0:zpr
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%6:zpr = MUL_ZPZZ_D_UNDEF $p0, %5:zpr, %4:zpr
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$z0 = COPY %6:zpr
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RET_ReallyLR implicit $z0
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...
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# Check that the register allocator prioritises hints that are set by the register
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# allocator itself (i.e. to use z4 for the result register).
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---
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name: prioritize_regalloc_hints
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isSSA: false
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noVRegs: false
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body: |
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bb.0.entry:
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%0:zpr = FDUP_ZI_S 0, implicit $vg
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%1:zpr = FDUP_ZI_S 16, implicit $vg
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%2:zpr = FDUP_ZI_S 32, implicit $vg
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%3:ppr_3b = PTRUE_S 31, implicit $vg
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; DBG: Machine code for function prioritize_regalloc_hints
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;
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; DBG: selectOrSplit ZPR:%4
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; DBG-NEXT: hints: $z4{{$}}
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;
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; DBG: [%0 -> $z0] ZPR
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; DBG: [%1 -> $z1] ZPR
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; DBG: [%2 -> $z2] ZPR
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; DBG: [%3 -> $p0] PPR_3b
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; DBG: [%4 -> $z4] ZPR
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%4:zpr = FMLA_ZPZZZ_S_UNDEF %3, %0, %1, %2
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$z4 = COPY %4
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RET_ReallyLR implicit $z4
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...
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