derek.holloway
7502bf64a4
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99 lines
3.5 KiB
LLVM
99 lines
3.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=aarch64-none-linux-gnu < %s | FileCheck %s
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define <8 x i16> @sdiv_v8i16_by_7(<8 x i16> %x) {
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; CHECK-LABEL: sdiv_v8i16_by_7:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #18725 // =0x4925
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; CHECK-NEXT: dup v1.8h, w8
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; CHECK-NEXT: smull2 v2.4s, v0.8h, v1.8h
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; CHECK-NEXT: smull v0.4s, v0.4h, v1.4h
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; CHECK-NEXT: uzp2 v0.8h, v0.8h, v2.8h
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; CHECK-NEXT: sshr v0.8h, v0.8h, #1
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; CHECK-NEXT: usra v0.8h, v0.8h, #15
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; CHECK-NEXT: ret
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%div = sdiv <8 x i16> %x, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>
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ret <8 x i16> %div
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}
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define <16 x i16> @sdiv_v16i16_by_7(<16 x i16> %x) {
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; CHECK-LABEL: sdiv_v16i16_by_7:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #18725 // =0x4925
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; CHECK-NEXT: dup v2.8h, w8
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; CHECK-NEXT: smull2 v3.4s, v0.8h, v2.8h
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; CHECK-NEXT: smull v0.4s, v0.4h, v2.4h
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; CHECK-NEXT: smull2 v4.4s, v1.8h, v2.8h
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; CHECK-NEXT: smull v1.4s, v1.4h, v2.4h
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; CHECK-NEXT: uzp2 v0.8h, v0.8h, v3.8h
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; CHECK-NEXT: uzp2 v1.8h, v1.8h, v4.8h
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; CHECK-NEXT: sshr v0.8h, v0.8h, #1
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; CHECK-NEXT: sshr v1.8h, v1.8h, #1
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; CHECK-NEXT: usra v0.8h, v0.8h, #15
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; CHECK-NEXT: usra v1.8h, v1.8h, #15
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; CHECK-NEXT: ret
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%div = sdiv <16 x i16> %x, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>
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ret <16 x i16> %div
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}
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define <8 x i16> @srem_v8i16_by_7(<8 x i16> %x) {
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; CHECK-LABEL: srem_v8i16_by_7:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #18725 // =0x4925
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; CHECK-NEXT: dup v1.8h, w8
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; CHECK-NEXT: smull2 v2.4s, v0.8h, v1.8h
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; CHECK-NEXT: smull v1.4s, v0.4h, v1.4h
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; CHECK-NEXT: uzp2 v1.8h, v1.8h, v2.8h
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; CHECK-NEXT: movi v2.8h, #7
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; CHECK-NEXT: sshr v1.8h, v1.8h, #1
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; CHECK-NEXT: usra v1.8h, v1.8h, #15
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; CHECK-NEXT: mls v0.8h, v1.8h, v2.8h
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; CHECK-NEXT: ret
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%rem = srem <8 x i16> %x, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>
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ret <8 x i16> %rem
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}
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define <16 x i16> @srem_v16i16_by_7(<16 x i16> %x) {
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; CHECK-LABEL: srem_v16i16_by_7:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #18725 // =0x4925
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; CHECK-NEXT: dup v2.8h, w8
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; CHECK-NEXT: smull2 v3.4s, v0.8h, v2.8h
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; CHECK-NEXT: smull v4.4s, v0.4h, v2.4h
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; CHECK-NEXT: smull2 v5.4s, v1.8h, v2.8h
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; CHECK-NEXT: smull v2.4s, v1.4h, v2.4h
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; CHECK-NEXT: uzp2 v3.8h, v4.8h, v3.8h
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; CHECK-NEXT: movi v4.8h, #7
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; CHECK-NEXT: uzp2 v2.8h, v2.8h, v5.8h
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; CHECK-NEXT: sshr v3.8h, v3.8h, #1
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; CHECK-NEXT: sshr v2.8h, v2.8h, #1
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; CHECK-NEXT: usra v3.8h, v3.8h, #15
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; CHECK-NEXT: usra v2.8h, v2.8h, #15
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; CHECK-NEXT: mls v0.8h, v3.8h, v4.8h
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; CHECK-NEXT: mls v1.8h, v2.8h, v4.8h
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; CHECK-NEXT: ret
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%rem = srem <16 x i16> %x, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>
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ret <16 x i16> %rem
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}
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define <8 x i16> @sdiv_exact_v8i16_by_255(<8 x i16> %x) {
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; CHECK-LABEL: sdiv_exact_v8i16_by_255:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mvni v1.8h, #1, lsl #8
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; CHECK-NEXT: mul v0.8h, v0.8h, v1.8h
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; CHECK-NEXT: ret
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%div = sdiv exact <8 x i16> %x, splat (i16 255)
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ret <8 x i16> %div
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}
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define <16 x i16> @sdiv_exact_v16i16_by_255(<16 x i16> %x) {
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; CHECK-LABEL: sdiv_exact_v16i16_by_255:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mvni v2.8h, #1, lsl #8
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; CHECK-NEXT: mul v0.8h, v0.8h, v2.8h
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; CHECK-NEXT: mul v1.8h, v1.8h, v2.8h
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; CHECK-NEXT: ret
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%div = sdiv exact <16 x i16> %x, splat (i16 255)
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ret <16 x i16> %div
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}
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