derek.holloway
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44 lines
2.0 KiB
LLVM
44 lines
2.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sme-i16i64 -force-streaming -verify-machineinstrs < %s | FileCheck %s
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define void @addha_s(<vscale x 4 x i1> %pn, <vscale x 4 x i1> %pm, <vscale x 4 x i32> %zn) {
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; CHECK-LABEL: addha_s:
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; CHECK: // %bb.0:
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; CHECK-NEXT: addha za0.s, p0/m, p1/m, z0.s
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; CHECK-NEXT: ret
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call void @llvm.aarch64.sme.addha.nxv4i32(i32 0, <vscale x 4 x i1> %pn, <vscale x 4 x i1> %pm, <vscale x 4 x i32> %zn)
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ret void
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}
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define void @addva_s(<vscale x 4 x i1> %pn, <vscale x 4 x i1> %pm, <vscale x 4 x i32> %zn) {
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; CHECK-LABEL: addva_s:
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; CHECK: // %bb.0:
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; CHECK-NEXT: addva za3.s, p0/m, p1/m, z0.s
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; CHECK-NEXT: ret
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call void @llvm.aarch64.sme.addva.nxv4i32(i32 3, <vscale x 4 x i1> %pn, <vscale x 4 x i1> %pm, <vscale x 4 x i32> %zn)
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ret void
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}
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define void @addha_d(<vscale x 2 x i1> %pn, <vscale x 2 x i1> %pm, <vscale x 2 x i64> %zn) {
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; CHECK-LABEL: addha_d:
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; CHECK: // %bb.0:
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; CHECK-NEXT: addha za0.d, p0/m, p1/m, z0.d
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; CHECK-NEXT: ret
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call void @llvm.aarch64.sme.addha.nxv2i64(i32 0, <vscale x 2 x i1> %pn, <vscale x 2 x i1> %pm, <vscale x 2 x i64> %zn)
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ret void
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}
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define void @addva_d(<vscale x 2 x i1> %pn, <vscale x 2 x i1> %pm, <vscale x 2 x i64> %zn) {
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; CHECK-LABEL: addva_d:
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; CHECK: // %bb.0:
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; CHECK-NEXT: addva za7.d, p0/m, p1/m, z0.d
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; CHECK-NEXT: ret
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call void @llvm.aarch64.sme.addva.nxv2i64(i32 7, <vscale x 2 x i1> %pn, <vscale x 2 x i1> %pm, <vscale x 2 x i64> %zn)
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ret void
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}
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declare void @llvm.aarch64.sme.addha.nxv4i32(i32, <vscale x 4 x i1>, <vscale x 4 x i1>, <vscale x 4 x i32>)
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declare void @llvm.aarch64.sme.addha.nxv2i64(i32, <vscale x 2 x i1>, <vscale x 2 x i1>, <vscale x 2 x i64>)
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declare void @llvm.aarch64.sme.addva.nxv4i32(i32, <vscale x 4 x i1>, <vscale x 4 x i1>, <vscale x 4 x i32>)
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declare void @llvm.aarch64.sme.addva.nxv2i64(i32, <vscale x 2 x i1>, <vscale x 2 x i1>, <vscale x 2 x i64>)
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