derek.holloway
7502bf64a4
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197 lines
4.7 KiB
LLVM
197 lines
4.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sme -verify-machineinstrs < %s | FileCheck %s
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define i64 @cntsb() {
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; CHECK-LABEL: cntsb:
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; CHECK: // %bb.0:
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; CHECK-NEXT: rdsvl x0, #1
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; CHECK-NEXT: ret
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%1 = call i64 @llvm.aarch64.sme.cntsd()
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%res = shl nuw nsw i64 %1, 3
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ret i64 %res
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}
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define i64 @cntsh() {
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; CHECK-LABEL: cntsh:
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; CHECK: // %bb.0:
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; CHECK-NEXT: rdsvl x8, #1
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; CHECK-NEXT: lsr x0, x8, #1
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; CHECK-NEXT: ret
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%1 = call i64 @llvm.aarch64.sme.cntsd()
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%res = shl nuw nsw i64 %1, 2
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ret i64 %res
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}
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define i64 @cntsw() {
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; CHECK-LABEL: cntsw:
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; CHECK: // %bb.0:
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; CHECK-NEXT: rdsvl x8, #1
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; CHECK-NEXT: lsr x0, x8, #2
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; CHECK-NEXT: ret
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%1 = call i64 @llvm.aarch64.sme.cntsd()
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%res = shl nuw nsw i64 %1, 1
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ret i64 %res
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}
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define i64 @cntsd() {
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; CHECK-LABEL: cntsd:
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; CHECK: // %bb.0:
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; CHECK-NEXT: rdsvl x8, #1
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; CHECK-NEXT: lsr x0, x8, #3
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; CHECK-NEXT: ret
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%res = call i64 @llvm.aarch64.sme.cntsd()
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ret i64 %res
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}
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define i64 @sme_cntsb_mul() {
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; CHECK-LABEL: sme_cntsb_mul:
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; CHECK: // %bb.0:
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; CHECK-NEXT: rdsvl x0, #4
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; CHECK-NEXT: ret
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%v = call i64 @llvm.aarch64.sme.cntsd()
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%shl = shl nuw nsw i64 %v, 3
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%res = mul nuw nsw i64 %shl, 4
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ret i64 %res
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}
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define i64 @sme_cntsh_mul() {
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; CHECK-LABEL: sme_cntsh_mul:
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; CHECK: // %bb.0:
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; CHECK-NEXT: rdsvl x0, #4
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; CHECK-NEXT: ret
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%v = call i64 @llvm.aarch64.sme.cntsd()
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%shl = shl nuw nsw i64 %v, 2
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%res = mul nuw nsw i64 %shl, 8
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ret i64 %res
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}
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define i64 @sme_cntsw_mul() {
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; CHECK-LABEL: sme_cntsw_mul:
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; CHECK: // %bb.0:
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; CHECK-NEXT: rdsvl x0, #4
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; CHECK-NEXT: ret
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%v = call i64 @llvm.aarch64.sme.cntsd()
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%shl = shl nuw nsw i64 %v, 1
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%res = mul nuw nsw i64 %shl, 16
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ret i64 %res
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}
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define i64 @sme_cntsd_mul() {
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; CHECK-LABEL: sme_cntsd_mul:
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; CHECK: // %bb.0:
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; CHECK-NEXT: rdsvl x0, #4
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; CHECK-NEXT: ret
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%v = call i64 @llvm.aarch64.sme.cntsd()
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%res = mul nuw nsw i64 %v, 32
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ret i64 %res
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}
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define i64 @sme_cntsb_mul_pos() {
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; CHECK-LABEL: sme_cntsb_mul_pos:
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; CHECK: // %bb.0:
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; CHECK-NEXT: rdsvl x8, #24
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; CHECK-NEXT: lsl x0, x8, #2
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; CHECK-NEXT: ret
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%v = call i64 @llvm.aarch64.sme.cntsd()
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%shl = shl nuw nsw i64 %v, 3
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%res = mul nuw nsw i64 %shl, 96
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ret i64 %res
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}
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define i64 @sme_cntsh_mul_pos() {
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; CHECK-LABEL: sme_cntsh_mul_pos:
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; CHECK: // %bb.0:
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; CHECK-NEXT: rdsvl x8, #3
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; CHECK-NEXT: lsr x0, x8, #1
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; CHECK-NEXT: ret
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%v = call i64 @llvm.aarch64.sme.cntsd()
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%shl = shl nuw nsw i64 %v, 2
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%res = mul nuw nsw i64 %shl, 3
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ret i64 %res
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}
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define i64 @sme_cntsw_mul_pos() {
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; CHECK-LABEL: sme_cntsw_mul_pos:
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; CHECK: // %bb.0:
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; CHECK-NEXT: rdsvl x8, #31
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; CHECK-NEXT: lsr x0, x8, #1
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; CHECK-NEXT: ret
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%v = call i64 @llvm.aarch64.sme.cntsd()
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%shl = shl nuw nsw i64 %v, 1
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%res = mul nuw nsw i64 %shl, 62
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ret i64 %res
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}
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define i64 @sme_cntsd_mul_pos() {
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; CHECK-LABEL: sme_cntsd_mul_pos:
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; CHECK: // %bb.0:
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; CHECK-NEXT: rdsvl x8, #31
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; CHECK-NEXT: lsl x0, x8, #2
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; CHECK-NEXT: ret
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%v = call i64 @llvm.aarch64.sme.cntsd()
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%res = mul nuw nsw i64 %v, 992
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ret i64 %res
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}
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define i64 @sme_cntsb_mul_neg() {
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; CHECK-LABEL: sme_cntsb_mul_neg:
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; CHECK: // %bb.0:
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; CHECK-NEXT: rdsvl x8, #-24
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; CHECK-NEXT: lsl x0, x8, #2
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; CHECK-NEXT: ret
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%v = call i64 @llvm.aarch64.sme.cntsd()
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%shl = shl nuw nsw i64 %v, 3
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%res = mul nuw nsw i64 %shl, -96
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ret i64 %res
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}
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define i64 @sme_cntsh_mul_neg() {
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; CHECK-LABEL: sme_cntsh_mul_neg:
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; CHECK: // %bb.0:
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; CHECK-NEXT: rdsvl x8, #-3
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; CHECK-NEXT: lsr x0, x8, #1
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; CHECK-NEXT: ret
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%v = call i64 @llvm.aarch64.sme.cntsd()
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%shl = shl nuw nsw i64 %v, 2
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%res = mul nuw nsw i64 %shl, -3
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ret i64 %res
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}
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define i64 @sme_cntsw_mul_neg() {
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; CHECK-LABEL: sme_cntsw_mul_neg:
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; CHECK: // %bb.0:
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; CHECK-NEXT: rdsvl x8, #-31
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; CHECK-NEXT: lsl x0, x8, #3
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; CHECK-NEXT: ret
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%v = call i64 @llvm.aarch64.sme.cntsd()
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%shl = shl nuw nsw i64 %v, 1
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%res = mul nuw nsw i64 %shl, -992
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ret i64 %res
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}
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define i64 @sme_cntsd_mul_neg() {
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; CHECK-LABEL: sme_cntsd_mul_neg:
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; CHECK: // %bb.0:
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; CHECK-NEXT: rdsvl x8, #-3
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; CHECK-NEXT: lsr x0, x8, #3
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; CHECK-NEXT: ret
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%v = call i64 @llvm.aarch64.sme.cntsd()
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%res = mul nuw nsw i64 %v, -3
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ret i64 %res
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}
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; Negative test for optimization failure
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define i64 @sme_cntsd_mul_fail() {
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; CHECK-LABEL: sme_cntsd_mul_fail:
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; CHECK: // %bb.0:
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; CHECK-NEXT: rdsvl x8, #1
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; CHECK-NEXT: mov w9, #993 // =0x3e1
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; CHECK-NEXT: lsr x8, x8, #3
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; CHECK-NEXT: mul x0, x8, x9
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; CHECK-NEXT: ret
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%v = call i64 @llvm.aarch64.sme.cntsd()
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%res = mul nuw nsw i64 %v, 993
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ret i64 %res
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}
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