derek.holloway
7502bf64a4
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94 lines
4.0 KiB
LLVM
94 lines
4.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc -aarch64-streaming-hazard-size=0 < %s | FileCheck %s
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target triple = "aarch64"
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; This function would normally scavenge a stackslot from the callee-save
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; area, which would lead to spilling 's0' to that stackslot before the
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; smstop and filling it with 'addvl + <offset>' after the smstop because
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; the frame-pointer is not available.
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; This would not be valid, since the vector-length has changed so 'addvl'
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; cannot be used. This is testing that the stackslot-scavenging is disabled
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; when there are any streaming-mode-changing call-sequences in the
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; function.
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define void @test_no_stackslot_scavenging(float %f) #0 {
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; CHECK-LABEL: test_no_stackslot_scavenging:
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; CHECK: // %bb.0:
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; CHECK-NEXT: stp d15, d14, [sp, #-96]! // 16-byte Folded Spill
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; CHECK-NEXT: stp d13, d12, [sp, #16] // 16-byte Folded Spill
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; CHECK-NEXT: stp d11, d10, [sp, #32] // 16-byte Folded Spill
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; CHECK-NEXT: stp d9, d8, [sp, #48] // 16-byte Folded Spill
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; CHECK-NEXT: str x29, [sp, #64] // 8-byte Spill
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; CHECK-NEXT: stp x30, x24, [sp, #80] // 16-byte Folded Spill
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; CHECK-NEXT: sub sp, sp, #16
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; CHECK-NEXT: addvl sp, sp, #-1
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; CHECK-NEXT: str s0, [sp, #12] // 4-byte Spill
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; CHECK-NEXT: //APP
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; CHECK-NEXT: //NO_APP
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; CHECK-NEXT: smstop sm
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; CHECK-NEXT: ldr s0, [sp, #12] // 4-byte Reload
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; CHECK-NEXT: bl use_f
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; CHECK-NEXT: smstart sm
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; CHECK-NEXT: addvl sp, sp, #1
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; CHECK-NEXT: add sp, sp, #16
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; CHECK-NEXT: ldp x30, x24, [sp, #80] // 16-byte Folded Reload
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; CHECK-NEXT: ldr x29, [sp, #64] // 8-byte Reload
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; CHECK-NEXT: ldp d9, d8, [sp, #48] // 16-byte Folded Reload
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; CHECK-NEXT: ldp d11, d10, [sp, #32] // 16-byte Folded Reload
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; CHECK-NEXT: ldp d13, d12, [sp, #16] // 16-byte Folded Reload
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; CHECK-NEXT: ldp d15, d14, [sp], #96 // 16-byte Folded Reload
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; CHECK-NEXT: ret
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%ptr = alloca <vscale x 16 x i8>
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call void asm sideeffect "", "~{x24}"() nounwind
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call void @use_f(float %f)
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ret void
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}
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define void @test_no_stackslot_scavenging_with_fp(float %f, i64 %n) #0 "frame-pointer"="all" {
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; CHECK-LABEL: test_no_stackslot_scavenging_with_fp:
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; CHECK: // %bb.0:
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; CHECK-NEXT: stp d15, d14, [sp, #-112]! // 16-byte Folded Spill
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; CHECK-NEXT: stp d13, d12, [sp, #16] // 16-byte Folded Spill
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; CHECK-NEXT: stp d11, d10, [sp, #32] // 16-byte Folded Spill
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; CHECK-NEXT: stp d9, d8, [sp, #48] // 16-byte Folded Spill
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; CHECK-NEXT: stp x29, x30, [sp, #64] // 16-byte Folded Spill
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; CHECK-NEXT: add x29, sp, #64
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; CHECK-NEXT: stp x28, x25, [sp, #80] // 16-byte Folded Spill
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; CHECK-NEXT: stp x24, x19, [sp, #96] // 16-byte Folded Spill
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; CHECK-NEXT: sub sp, sp, #16
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; CHECK-NEXT: addvl sp, sp, #-1
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; CHECK-NEXT: lsl x9, x0, #3
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; CHECK-NEXT: mov x8, sp
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; CHECK-NEXT: mov x19, sp
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; CHECK-NEXT: str s0, [x19, #12] // 4-byte Spill
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; CHECK-NEXT: add x9, x9, #15
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; CHECK-NEXT: and x9, x9, #0xfffffffffffffff0
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; CHECK-NEXT: sub x8, x8, x9
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; CHECK-NEXT: mov sp, x8
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; CHECK-NEXT: //APP
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; CHECK-NEXT: //NO_APP
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; CHECK-NEXT: smstop sm
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; CHECK-NEXT: ldr s0, [x19, #12] // 4-byte Reload
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; CHECK-NEXT: bl use_f
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; CHECK-NEXT: smstart sm
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; CHECK-NEXT: sub sp, x29, #64
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; CHECK-NEXT: ldp x24, x19, [sp, #96] // 16-byte Folded Reload
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; CHECK-NEXT: ldp x28, x25, [sp, #80] // 16-byte Folded Reload
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; CHECK-NEXT: ldp x29, x30, [sp, #64] // 16-byte Folded Reload
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; CHECK-NEXT: ldp d9, d8, [sp, #48] // 16-byte Folded Reload
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; CHECK-NEXT: ldp d11, d10, [sp, #32] // 16-byte Folded Reload
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; CHECK-NEXT: ldp d13, d12, [sp, #16] // 16-byte Folded Reload
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; CHECK-NEXT: ldp d15, d14, [sp], #112 // 16-byte Folded Reload
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; CHECK-NEXT: ret
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%ptr2 = alloca i64, i64 %n, align 8
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%ptr = alloca <vscale x 16 x i8>
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call void asm sideeffect "", "~{x24},~{x25}"() nounwind
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call void @use_f(float %f)
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ret void
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}
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declare void @use_f(float)
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declare void @use_f_and_ptr(float, ptr)
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attributes #0 = { nounwind "target-features"="+sve,+sme" "aarch64_pstate_sm_enabled" }
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