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TheRock/compiler/amd-llvm/llvm/test/CodeGen/AArch64/sme-za-control-flow.ll
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Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sme < %s | FileCheck %s
declare void @private_za_call()
declare void @shared_za_call() "aarch64_inout_za"
define void @private_za_loop(i32 %n) "aarch64_inout_za" nounwind {
; CHECK-LABEL: private_za_loop:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: stp x29, x30, [sp, #-32]! // 16-byte Folded Spill
; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-NEXT: mov x29, sp
; CHECK-NEXT: sub sp, sp, #16
; CHECK-NEXT: rdsvl x8, #1
; CHECK-NEXT: mov x9, sp
; CHECK-NEXT: msub x9, x8, x8, x9
; CHECK-NEXT: mov sp, x9
; CHECK-NEXT: cmp w0, #1
; CHECK-NEXT: stp x9, x8, [x29, #-16]
; CHECK-NEXT: b.lt .LBB0_5
; CHECK-NEXT: // %bb.1: // %loop.preheader
; CHECK-NEXT: mov w19, w0
; CHECK-NEXT: sub x20, x29, #16
; CHECK-NEXT: b .LBB0_3
; CHECK-NEXT: .LBB0_2: // %loop
; CHECK-NEXT: // in Loop: Header=BB0_3 Depth=1
; CHECK-NEXT: msr TPIDR2_EL0, xzr
; CHECK-NEXT: cbz w19, .LBB0_5
; CHECK-NEXT: .LBB0_3: // %loop
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-NEXT: msr TPIDR2_EL0, x20
; CHECK-NEXT: bl private_za_call
; CHECK-NEXT: sub w19, w19, #1
; CHECK-NEXT: smstart za
; CHECK-NEXT: mrs x8, TPIDR2_EL0
; CHECK-NEXT: sub x0, x29, #16
; CHECK-NEXT: cbnz x8, .LBB0_2
; CHECK-NEXT: // %bb.4: // %loop
; CHECK-NEXT: // in Loop: Header=BB0_3 Depth=1
; CHECK-NEXT: bl __arm_tpidr2_restore
; CHECK-NEXT: b .LBB0_2
; CHECK-NEXT: .LBB0_5: // %exit
; CHECK-NEXT: mov sp, x29
; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-NEXT: ldp x29, x30, [sp], #32 // 16-byte Folded Reload
; CHECK-NEXT: ret
entry:
%cmpgt = icmp sgt i32 %n, 0
br i1 %cmpgt, label %loop, label %exit
loop:
%iv = phi i32 [ %next_iv, %loop ], [ 0, %entry ]
tail call void @private_za_call()
%next_iv = add nuw nsw i32 %iv, 1
%cmpeq = icmp eq i32 %next_iv, %n
br i1 %cmpeq, label %exit, label %loop
exit:
ret void
}
; FIXME: In the new lowering we could weight edges to avoid doing the lazy save in the loop.
define void @private_za_loop_active_entry_and_exit(i32 %n) "aarch64_inout_za" nounwind {
; CHECK-LABEL: private_za_loop_active_entry_and_exit:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: stp x29, x30, [sp, #-32]! // 16-byte Folded Spill
; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-NEXT: mov x29, sp
; CHECK-NEXT: sub sp, sp, #16
; CHECK-NEXT: rdsvl x8, #1
; CHECK-NEXT: mov x9, sp
; CHECK-NEXT: msub x9, x8, x8, x9
; CHECK-NEXT: mov sp, x9
; CHECK-NEXT: mov w19, w0
; CHECK-NEXT: stp x9, x8, [x29, #-16]
; CHECK-NEXT: bl shared_za_call
; CHECK-NEXT: cmp w19, #1
; CHECK-NEXT: b.lt .LBB1_5
; CHECK-NEXT: // %bb.1: // %loop.preheader
; CHECK-NEXT: sub x20, x29, #16
; CHECK-NEXT: b .LBB1_3
; CHECK-NEXT: .LBB1_2: // %loop
; CHECK-NEXT: // in Loop: Header=BB1_3 Depth=1
; CHECK-NEXT: msr TPIDR2_EL0, xzr
; CHECK-NEXT: cbz w19, .LBB1_5
; CHECK-NEXT: .LBB1_3: // %loop
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-NEXT: msr TPIDR2_EL0, x20
; CHECK-NEXT: bl private_za_call
; CHECK-NEXT: sub w19, w19, #1
; CHECK-NEXT: smstart za
; CHECK-NEXT: mrs x8, TPIDR2_EL0
; CHECK-NEXT: sub x0, x29, #16
; CHECK-NEXT: cbnz x8, .LBB1_2
; CHECK-NEXT: // %bb.4: // %loop
; CHECK-NEXT: // in Loop: Header=BB1_3 Depth=1
; CHECK-NEXT: bl __arm_tpidr2_restore
; CHECK-NEXT: b .LBB1_2
; CHECK-NEXT: .LBB1_5: // %exit
; CHECK-NEXT: mov sp, x29
; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-NEXT: ldp x29, x30, [sp], #32 // 16-byte Folded Reload
; CHECK-NEXT: b shared_za_call
entry:
%cmpgt = icmp sgt i32 %n, 0
tail call void @shared_za_call()
br i1 %cmpgt, label %loop, label %exit
loop:
%iv = phi i32 [ %next_iv, %loop ], [ 0, %entry ]
tail call void @private_za_call()
%next_iv = add nuw nsw i32 %iv, 1
%cmpeq = icmp eq i32 %next_iv, %n
br i1 %cmpeq, label %exit, label %loop
exit:
tail call void @shared_za_call()
ret void
}
define void @shared_za_loop(i32 %n) "aarch64_inout_za" nounwind {
; CHECK-LABEL: shared_za_loop:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: cmp w0, #1
; CHECK-NEXT: b.lt .LBB2_4
; CHECK-NEXT: // %bb.1: // %loop.preheader
; CHECK-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
; CHECK-NEXT: mov w19, w0
; CHECK-NEXT: .LBB2_2: // %loop
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-NEXT: bl shared_za_call
; CHECK-NEXT: subs w19, w19, #1
; CHECK-NEXT: b.ne .LBB2_2
; CHECK-NEXT: // %bb.3:
; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
; CHECK-NEXT: .LBB2_4: // %exit
; CHECK-NEXT: ret
entry:
%cmpgt = icmp sgt i32 %n, 0
br i1 %cmpgt, label %loop, label %exit
loop:
%iv = phi i32 [ %next_iv, %loop ], [ 0, %entry ]
tail call void @shared_za_call()
%next_iv = add nuw nsw i32 %iv, 1
%cmpeq = icmp eq i32 %next_iv, %n
br i1 %cmpeq, label %exit, label %loop
exit:
ret void
}
define void @cond_private_za_call(i1 %cond) "aarch64_inout_za" nounwind {
; CHECK-LABEL: cond_private_za_call:
; CHECK: // %bb.0:
; CHECK-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; CHECK-NEXT: mov x29, sp
; CHECK-NEXT: sub sp, sp, #16
; CHECK-NEXT: rdsvl x8, #1
; CHECK-NEXT: mov x9, sp
; CHECK-NEXT: msub x9, x8, x8, x9
; CHECK-NEXT: mov sp, x9
; CHECK-NEXT: stp x9, x8, [x29, #-16]
; CHECK-NEXT: tbz w0, #0, .LBB3_4
; CHECK-NEXT: // %bb.1: // %private_za_call
; CHECK-NEXT: sub x8, x29, #16
; CHECK-NEXT: msr TPIDR2_EL0, x8
; CHECK-NEXT: bl private_za_call
; CHECK-NEXT: smstart za
; CHECK-NEXT: mrs x8, TPIDR2_EL0
; CHECK-NEXT: sub x0, x29, #16
; CHECK-NEXT: cbnz x8, .LBB3_3
; CHECK-NEXT: // %bb.2: // %private_za_call
; CHECK-NEXT: bl __arm_tpidr2_restore
; CHECK-NEXT: .LBB3_3: // %private_za_call
; CHECK-NEXT: msr TPIDR2_EL0, xzr
; CHECK-NEXT: .LBB3_4: // %exit
; CHECK-NEXT: mov sp, x29
; CHECK-NEXT: ldp x29, x30, [sp], #16 // 16-byte Folded Reload
; CHECK-NEXT: b shared_za_call
br i1 %cond, label %private_za_call, label %exit
private_za_call:
tail call void @private_za_call()
br label %exit
exit:
tail call void @shared_za_call()
ret void
}
define void @mixed_shared_private_za_loop(ptr %cond) "aarch64_inout_za" nounwind {
; CHECK-LABEL: mixed_shared_private_za_loop:
; CHECK: // %bb.0:
; CHECK-NEXT: stp x29, x30, [sp, #-32]! // 16-byte Folded Spill
; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-NEXT: mov x29, sp
; CHECK-NEXT: sub sp, sp, #16
; CHECK-NEXT: rdsvl x8, #1
; CHECK-NEXT: mov x9, sp
; CHECK-NEXT: msub x9, x8, x8, x9
; CHECK-NEXT: mov sp, x9
; CHECK-NEXT: mov x19, x0
; CHECK-NEXT: sub x20, x29, #16
; CHECK-NEXT: stp x9, x8, [x29, #-16]
; CHECK-NEXT: b .LBB4_2
; CHECK-NEXT: .LBB4_1: // %loop
; CHECK-NEXT: // in Loop: Header=BB4_2 Depth=1
; CHECK-NEXT: msr TPIDR2_EL0, xzr
; CHECK-NEXT: tbz w8, #0, .LBB4_4
; CHECK-NEXT: .LBB4_2: // %loop
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-NEXT: bl shared_za_call
; CHECK-NEXT: msr TPIDR2_EL0, x20
; CHECK-NEXT: bl private_za_call
; CHECK-NEXT: ldrb w8, [x19]
; CHECK-NEXT: smstart za
; CHECK-NEXT: mrs x9, TPIDR2_EL0
; CHECK-NEXT: sub x0, x29, #16
; CHECK-NEXT: cbnz x9, .LBB4_1
; CHECK-NEXT: // %bb.3: // %loop
; CHECK-NEXT: // in Loop: Header=BB4_2 Depth=1
; CHECK-NEXT: bl __arm_tpidr2_restore
; CHECK-NEXT: b .LBB4_1
; CHECK-NEXT: .LBB4_4: // %exit
; CHECK-NEXT: bl shared_za_call
; CHECK-NEXT: mov sp, x29
; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-NEXT: ldp x29, x30, [sp], #32 // 16-byte Folded Reload
; CHECK-NEXT: ret
br label %loop
loop:
call void @shared_za_call()
call void @private_za_call()
br label %latch
latch:
%bool = load volatile i8, ptr %cond, align 1
%trunc = trunc i8 %bool to i1
br i1 %trunc, label %loop, label %exit
exit:
call void @shared_za_call()
ret void
}
define void @cond_clobber_followed_by_clobber(i1 %cond) "aarch64_inout_za" nounwind {
; CHECK-LABEL: cond_clobber_followed_by_clobber:
; CHECK: // %bb.0:
; CHECK-NEXT: stp x29, x30, [sp, #-32]! // 16-byte Folded Spill
; CHECK-NEXT: str x19, [sp, #16] // 8-byte Spill
; CHECK-NEXT: mov x29, sp
; CHECK-NEXT: sub sp, sp, #16
; CHECK-NEXT: rdsvl x8, #1
; CHECK-NEXT: mov x9, sp
; CHECK-NEXT: msub x9, x8, x8, x9
; CHECK-NEXT: mov sp, x9
; CHECK-NEXT: mov w19, w0
; CHECK-NEXT: stp x9, x8, [x29, #-16]
; CHECK-NEXT: bl shared_za_call
; CHECK-NEXT: sub x8, x29, #16
; CHECK-NEXT: msr TPIDR2_EL0, x8
; CHECK-NEXT: tbz w19, #0, .LBB5_2
; CHECK-NEXT: // %bb.1: // %cond_clobber
; CHECK-NEXT: bl private_za_call
; CHECK-NEXT: .LBB5_2: // %exit
; CHECK-NEXT: bl private_za_call
; CHECK-NEXT: smstart za
; CHECK-NEXT: mrs x8, TPIDR2_EL0
; CHECK-NEXT: sub x0, x29, #16
; CHECK-NEXT: cbnz x8, .LBB5_4
; CHECK-NEXT: // %bb.3: // %exit
; CHECK-NEXT: bl __arm_tpidr2_restore
; CHECK-NEXT: .LBB5_4: // %exit
; CHECK-NEXT: msr TPIDR2_EL0, xzr
; CHECK-NEXT: mov sp, x29
; CHECK-NEXT: ldr x19, [sp, #16] // 8-byte Reload
; CHECK-NEXT: ldp x29, x30, [sp], #32 // 16-byte Folded Reload
; CHECK-NEXT: b shared_za_call
tail call void @shared_za_call()
br i1 %cond, label %cond_clobber, label %exit
cond_clobber:
tail call void @private_za_call()
br label %exit
exit:
tail call void @private_za_call()
tail call void @shared_za_call()
ret void
}
define void @conditionally_use_za(i1 %cond) "aarch64_inout_za" nounwind {
; CHECK-LABEL: conditionally_use_za:
; CHECK: // %bb.0:
; CHECK-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; CHECK-NEXT: mov x29, sp
; CHECK-NEXT: sub sp, sp, #16
; CHECK-NEXT: rdsvl x8, #1
; CHECK-NEXT: mov x9, sp
; CHECK-NEXT: msub x9, x8, x8, x9
; CHECK-NEXT: mov sp, x9
; CHECK-NEXT: stp x9, x8, [x29, #-16]
; CHECK-NEXT: tbz w0, #0, .LBB6_4
; CHECK-NEXT: // %bb.1: // %use_za
; CHECK-NEXT: bl shared_za_call
; CHECK-NEXT: sub x8, x29, #16
; CHECK-NEXT: msr TPIDR2_EL0, x8
; CHECK-NEXT: bl private_za_call
; CHECK-NEXT: smstart za
; CHECK-NEXT: mrs x8, TPIDR2_EL0
; CHECK-NEXT: sub x0, x29, #16
; CHECK-NEXT: cbnz x8, .LBB6_3
; CHECK-NEXT: // %bb.2: // %use_za
; CHECK-NEXT: bl __arm_tpidr2_restore
; CHECK-NEXT: .LBB6_3: // %use_za
; CHECK-NEXT: msr TPIDR2_EL0, xzr
; CHECK-NEXT: .LBB6_4: // %exit
; CHECK-NEXT: mov sp, x29
; CHECK-NEXT: ldp x29, x30, [sp], #16 // 16-byte Folded Reload
; CHECK-NEXT: ret
br i1 %cond, label %use_za, label %exit
use_za:
tail call void @shared_za_call()
tail call void @private_za_call()
br label %exit
exit:
ret void
}
define void @diamond_mixed_za_merge_shared(i1 %cond) "aarch64_inout_za" nounwind {
; CHECK-LABEL: diamond_mixed_za_merge_shared:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; CHECK-NEXT: mov x29, sp
; CHECK-NEXT: sub sp, sp, #16
; CHECK-NEXT: rdsvl x8, #1
; CHECK-NEXT: mov x9, sp
; CHECK-NEXT: msub x9, x8, x8, x9
; CHECK-NEXT: mov sp, x9
; CHECK-NEXT: stp x9, x8, [x29, #-16]
; CHECK-NEXT: tbz w0, #0, .LBB7_2
; CHECK-NEXT: // %bb.1: // %then
; CHECK-NEXT: bl shared_za_call
; CHECK-NEXT: b .LBB7_5
; CHECK-NEXT: .LBB7_2: // %else
; CHECK-NEXT: sub x8, x29, #16
; CHECK-NEXT: msr TPIDR2_EL0, x8
; CHECK-NEXT: bl private_za_call
; CHECK-NEXT: smstart za
; CHECK-NEXT: mrs x8, TPIDR2_EL0
; CHECK-NEXT: sub x0, x29, #16
; CHECK-NEXT: cbnz x8, .LBB7_4
; CHECK-NEXT: // %bb.3: // %else
; CHECK-NEXT: bl __arm_tpidr2_restore
; CHECK-NEXT: .LBB7_4: // %else
; CHECK-NEXT: msr TPIDR2_EL0, xzr
; CHECK-NEXT: .LBB7_5: // %merge_shared
; CHECK-NEXT: bl shared_za_call
; CHECK-NEXT: mov sp, x29
; CHECK-NEXT: ldp x29, x30, [sp], #16 // 16-byte Folded Reload
; CHECK-NEXT: ret
entry:
br i1 %cond, label %then, label %else
then:
call void @shared_za_call()
br label %merge_shared
else:
call void @private_za_call()
br label %merge_shared
merge_shared:
call void @shared_za_call()
ret void
}
define void @diamond_mixed_za_merge_private(i1 %cond) "aarch64_inout_za" nounwind {
; CHECK-LABEL: diamond_mixed_za_merge_private:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: stp x29, x30, [sp, #-16]! // 16-byte Folded Spill
; CHECK-NEXT: mov x29, sp
; CHECK-NEXT: sub sp, sp, #16
; CHECK-NEXT: rdsvl x8, #1
; CHECK-NEXT: mov x9, sp
; CHECK-NEXT: msub x9, x8, x8, x9
; CHECK-NEXT: mov sp, x9
; CHECK-NEXT: stp x9, x8, [x29, #-16]
; CHECK-NEXT: tbz w0, #0, .LBB8_2
; CHECK-NEXT: // %bb.1: // %then
; CHECK-NEXT: bl shared_za_call
; CHECK-NEXT: sub x8, x29, #16
; CHECK-NEXT: msr TPIDR2_EL0, x8
; CHECK-NEXT: b .LBB8_3
; CHECK-NEXT: .LBB8_2: // %else
; CHECK-NEXT: sub x8, x29, #16
; CHECK-NEXT: msr TPIDR2_EL0, x8
; CHECK-NEXT: bl private_za_call
; CHECK-NEXT: .LBB8_3: // %merge_private_za
; CHECK-NEXT: bl private_za_call
; CHECK-NEXT: smstart za
; CHECK-NEXT: mrs x8, TPIDR2_EL0
; CHECK-NEXT: sub x0, x29, #16
; CHECK-NEXT: cbnz x8, .LBB8_5
; CHECK-NEXT: // %bb.4: // %merge_private_za
; CHECK-NEXT: bl __arm_tpidr2_restore
; CHECK-NEXT: .LBB8_5: // %merge_private_za
; CHECK-NEXT: msr TPIDR2_EL0, xzr
; CHECK-NEXT: mov sp, x29
; CHECK-NEXT: ldp x29, x30, [sp], #16 // 16-byte Folded Reload
; CHECK-NEXT: ret
entry:
br i1 %cond, label %then, label %else
then:
call void @shared_za_call()
br label %merge_private_za
else:
call void @private_za_call()
br label %merge_private_za
merge_private_za:
call void @private_za_call()
ret void
}
define void @critical_edge_mixed_za(i1 %c1, i1 %c2) "aarch64_inout_za" nounwind {
; CHECK-LABEL: critical_edge_mixed_za:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: stp x29, x30, [sp, #-32]! // 16-byte Folded Spill
; CHECK-NEXT: str x19, [sp, #16] // 8-byte Spill
; CHECK-NEXT: mov x29, sp
; CHECK-NEXT: sub sp, sp, #16
; CHECK-NEXT: rdsvl x8, #1
; CHECK-NEXT: mov x9, sp
; CHECK-NEXT: msub x9, x8, x8, x9
; CHECK-NEXT: mov sp, x9
; CHECK-NEXT: mov w19, w1
; CHECK-NEXT: stp x9, x8, [x29, #-16]
; CHECK-NEXT: tbz w0, #0, .LBB9_5
; CHECK-NEXT: // %bb.1: // %shared_path
; CHECK-NEXT: bl shared_za_call
; CHECK-NEXT: tbz w19, #0, .LBB9_8
; CHECK-NEXT: .LBB9_2: // %exit_private
; CHECK-NEXT: sub x8, x29, #16
; CHECK-NEXT: msr TPIDR2_EL0, x8
; CHECK-NEXT: bl private_za_call
; CHECK-NEXT: smstart za
; CHECK-NEXT: mrs x8, TPIDR2_EL0
; CHECK-NEXT: sub x0, x29, #16
; CHECK-NEXT: cbnz x8, .LBB9_4
; CHECK-NEXT: // %bb.3: // %exit_private
; CHECK-NEXT: bl __arm_tpidr2_restore
; CHECK-NEXT: .LBB9_4: // %exit_private
; CHECK-NEXT: msr TPIDR2_EL0, xzr
; CHECK-NEXT: b .LBB9_9
; CHECK-NEXT: .LBB9_5: // %private_path
; CHECK-NEXT: sub x8, x29, #16
; CHECK-NEXT: msr TPIDR2_EL0, x8
; CHECK-NEXT: bl private_za_call
; CHECK-NEXT: smstart za
; CHECK-NEXT: mrs x8, TPIDR2_EL0
; CHECK-NEXT: sub x0, x29, #16
; CHECK-NEXT: cbnz x8, .LBB9_7
; CHECK-NEXT: // %bb.6: // %private_path
; CHECK-NEXT: bl __arm_tpidr2_restore
; CHECK-NEXT: .LBB9_7: // %private_path
; CHECK-NEXT: msr TPIDR2_EL0, xzr
; CHECK-NEXT: tbnz w19, #0, .LBB9_2
; CHECK-NEXT: .LBB9_8: // %exit_shared
; CHECK-NEXT: bl shared_za_call
; CHECK-NEXT: .LBB9_9: // %common.ret
; CHECK-NEXT: mov sp, x29
; CHECK-NEXT: ldr x19, [sp, #16] // 8-byte Reload
; CHECK-NEXT: ldp x29, x30, [sp], #32 // 16-byte Folded Reload
; CHECK-NEXT: ret
entry:
br i1 %c1, label %shared_path, label %private_path
shared_path:
call void @shared_za_call()
br label %merge
private_path:
call void @private_za_call()
br label %merge
merge:
br i1 %c2, label %exit_private, label %exit_shared
exit_private:
call void @private_za_call()
ret void
exit_shared:
call void @shared_za_call()
ret void
}
define void @nested_cond_in_loop(i32 %n, i1 %cond) "aarch64_inout_za" nounwind {
; CHECK-LABEL: nested_cond_in_loop:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: stp x29, x30, [sp, #-48]! // 16-byte Folded Spill
; CHECK-NEXT: stp x22, x21, [sp, #16] // 16-byte Folded Spill
; CHECK-NEXT: mov x29, sp
; CHECK-NEXT: stp x20, x19, [sp, #32] // 16-byte Folded Spill
; CHECK-NEXT: sub sp, sp, #16
; CHECK-NEXT: rdsvl x8, #1
; CHECK-NEXT: mov x9, sp
; CHECK-NEXT: msub x9, x8, x8, x9
; CHECK-NEXT: mov sp, x9
; CHECK-NEXT: cmp w0, #1
; CHECK-NEXT: stp x9, x8, [x29, #-16]
; CHECK-NEXT: b.lt .LBB10_8
; CHECK-NEXT: // %bb.1: // %loop.preheader
; CHECK-NEXT: mov w19, w1
; CHECK-NEXT: mov w20, w0
; CHECK-NEXT: mov w21, wzr
; CHECK-NEXT: sub x22, x29, #16
; CHECK-NEXT: b .LBB10_4
; CHECK-NEXT: .LBB10_2: // %use_shared
; CHECK-NEXT: // in Loop: Header=BB10_4 Depth=1
; CHECK-NEXT: bl shared_za_call
; CHECK-NEXT: .LBB10_3: // %latch
; CHECK-NEXT: // in Loop: Header=BB10_4 Depth=1
; CHECK-NEXT: add w21, w21, #1
; CHECK-NEXT: cmp w21, w20
; CHECK-NEXT: b.ge .LBB10_8
; CHECK-NEXT: .LBB10_4: // %loop
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-NEXT: tbnz w19, #0, .LBB10_2
; CHECK-NEXT: // %bb.5: // %use_private
; CHECK-NEXT: // in Loop: Header=BB10_4 Depth=1
; CHECK-NEXT: msr TPIDR2_EL0, x22
; CHECK-NEXT: bl private_za_call
; CHECK-NEXT: smstart za
; CHECK-NEXT: mrs x8, TPIDR2_EL0
; CHECK-NEXT: sub x0, x29, #16
; CHECK-NEXT: cbnz x8, .LBB10_7
; CHECK-NEXT: // %bb.6: // %use_private
; CHECK-NEXT: // in Loop: Header=BB10_4 Depth=1
; CHECK-NEXT: bl __arm_tpidr2_restore
; CHECK-NEXT: .LBB10_7: // %use_private
; CHECK-NEXT: // in Loop: Header=BB10_4 Depth=1
; CHECK-NEXT: msr TPIDR2_EL0, xzr
; CHECK-NEXT: b .LBB10_3
; CHECK-NEXT: .LBB10_8: // %exit
; CHECK-NEXT: mov sp, x29
; CHECK-NEXT: ldp x20, x19, [sp, #32] // 16-byte Folded Reload
; CHECK-NEXT: ldp x22, x21, [sp, #16] // 16-byte Folded Reload
; CHECK-NEXT: ldp x29, x30, [sp], #48 // 16-byte Folded Reload
; CHECK-NEXT: ret
entry:
%cmp = icmp sgt i32 %n, 0
br i1 %cmp, label %loop, label %exit
loop:
%iv = phi i32 [ 0, %entry ], [ %inc, %latch ]
br i1 %cond, label %use_shared, label %use_private
use_shared:
call void @shared_za_call()
br label %latch
use_private:
call void @private_za_call()
br label %latch
latch:
%inc = add i32 %iv, 1
%cmp2 = icmp slt i32 %inc, %n
br i1 %cmp2, label %loop, label %exit
exit:
ret void
}
define void @loop_with_external_entry(i1 %c1, i1 %c2) "aarch64_inout_za" nounwind {
; CHECK-LABEL: loop_with_external_entry:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: stp x29, x30, [sp, #-32]! // 16-byte Folded Spill
; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
; CHECK-NEXT: mov x29, sp
; CHECK-NEXT: sub sp, sp, #16
; CHECK-NEXT: rdsvl x8, #1
; CHECK-NEXT: mov x9, sp
; CHECK-NEXT: msub x9, x8, x8, x9
; CHECK-NEXT: mov sp, x9
; CHECK-NEXT: mov w19, w1
; CHECK-NEXT: stp x9, x8, [x29, #-16]
; CHECK-NEXT: tbz w0, #0, .LBB11_2
; CHECK-NEXT: // %bb.1: // %init
; CHECK-NEXT: bl shared_za_call
; CHECK-NEXT: .LBB11_2: // %loop.preheader
; CHECK-NEXT: sub x20, x29, #16
; CHECK-NEXT: b .LBB11_4
; CHECK-NEXT: .LBB11_3: // %loop
; CHECK-NEXT: // in Loop: Header=BB11_4 Depth=1
; CHECK-NEXT: msr TPIDR2_EL0, xzr
; CHECK-NEXT: tbz w19, #0, .LBB11_6
; CHECK-NEXT: .LBB11_4: // %loop
; CHECK-NEXT: // =>This Inner Loop Header: Depth=1
; CHECK-NEXT: msr TPIDR2_EL0, x20
; CHECK-NEXT: bl private_za_call
; CHECK-NEXT: smstart za
; CHECK-NEXT: mrs x8, TPIDR2_EL0
; CHECK-NEXT: sub x0, x29, #16
; CHECK-NEXT: cbnz x8, .LBB11_3
; CHECK-NEXT: // %bb.5: // %loop
; CHECK-NEXT: // in Loop: Header=BB11_4 Depth=1
; CHECK-NEXT: bl __arm_tpidr2_restore
; CHECK-NEXT: b .LBB11_3
; CHECK-NEXT: .LBB11_6: // %exit
; CHECK-NEXT: mov sp, x29
; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
; CHECK-NEXT: ldp x29, x30, [sp], #32 // 16-byte Folded Reload
; CHECK-NEXT: ret
entry:
br i1 %c1, label %init, label %loop
init:
call void @shared_za_call()
br label %loop
loop:
call void @private_za_call()
br i1 %c2, label %loop, label %exit
exit:
ret void
}
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