derek.holloway
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66 lines
2.7 KiB
LLVM
66 lines
2.7 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sme2 -force-streaming < %s | FileCheck %s
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; lookup table expand one register
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define <vscale x 16 x i8> @luti2_i8(<vscale x 16 x i8> %x) {
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; CHECK-LABEL: luti2_i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: luti2 z0.b, zt0, z0[15]
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; CHECK-NEXT: ret
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%res = call <vscale x 16 x i8> @llvm.aarch64.sme.luti2.lane.zt.nxv16i8(i32 0, <vscale x 16 x i8> %x, i32 15)
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ret <vscale x 16 x i8> %res
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}
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define <vscale x 8 x i16> @luti2_i16(<vscale x 16 x i8> %x) {
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; CHECK-LABEL: luti2_i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: luti2 z0.h, zt0, z0[15]
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; CHECK-NEXT: ret
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%res = call <vscale x 8 x i16> @llvm.aarch64.sme.luti2.lane.zt.nxv8i16(i32 0, <vscale x 16 x i8> %x, i32 15)
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ret <vscale x 8 x i16> %res
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}
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define <vscale x 4 x i32> @luti2_i32(<vscale x 16 x i8> %x) {
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; CHECK-LABEL: luti2_i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: luti2 z0.s, zt0, z0[15]
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; CHECK-NEXT: ret
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%res = call <vscale x 4 x i32> @llvm.aarch64.sme.luti2.lane.zt.nxv4i32(i32 0, <vscale x 16 x i8> %x, i32 15)
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ret <vscale x 4 x i32> %res
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}
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define <vscale x 8 x half> @luti2_f16(<vscale x 16 x i8> %x) {
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; CHECK-LABEL: luti2_f16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: luti2 z0.h, zt0, z0[15]
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; CHECK-NEXT: ret
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%res = call <vscale x 8 x half> @llvm.aarch64.sme.luti2.lane.zt.nxv8f16(i32 0, <vscale x 16 x i8> %x, i32 15)
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ret <vscale x 8 x half> %res
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}
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define <vscale x 8 x bfloat> @luti2_bf16(<vscale x 16 x i8> %x) {
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; CHECK-LABEL: luti2_bf16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: luti2 z0.h, zt0, z0[15]
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; CHECK-NEXT: ret
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%res = call <vscale x 8 x bfloat> @llvm.aarch64.sme.luti2.lane.zt.nxv8bf16(i32 0, <vscale x 16 x i8> %x, i32 15)
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ret <vscale x 8 x bfloat> %res
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}
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define <vscale x 4 x float> @luti2_f32(<vscale x 16 x i8> %x) {
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; CHECK-LABEL: luti2_f32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: luti2 z0.s, zt0, z0[15]
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; CHECK-NEXT: ret
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%res = call <vscale x 4 x float> @llvm.aarch64.sme.luti2.lane.zt.nxv4f32(i32 0, <vscale x 16 x i8> %x, i32 15)
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ret <vscale x 4 x float> %res
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}
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declare <vscale x 16 x i8> @llvm.aarch64.sme.luti2.lane.zt.nxv16i8(i32, <vscale x 16 x i8>, i32)
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declare <vscale x 8 x i16> @llvm.aarch64.sme.luti2.lane.zt.nxv8i16(i32, <vscale x 16 x i8>, i32)
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declare <vscale x 4 x i32> @llvm.aarch64.sme.luti2.lane.zt.nxv4i32(i32, <vscale x 16 x i8>, i32)
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declare <vscale x 8 x half> @llvm.aarch64.sme.luti2.lane.zt.nxv8f16(i32, <vscale x 16 x i8>, i32)
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declare <vscale x 8 x bfloat> @llvm.aarch64.sme.luti2.lane.zt.nxv8bf16(i32, <vscale x 16 x i8>, i32)
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declare <vscale x 4 x float> @llvm.aarch64.sme.luti2.lane.zt.nxv4f32(i32, <vscale x 16 x i8>, i32)
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