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77 lines
2.0 KiB
LLVM
77 lines
2.0 KiB
LLVM
; RUN: sed -e 's/SLHATTR/speculative_load_hardening/' %s | llc -verify-machineinstrs -mtriple=aarch64-none-linux-gnu 2>&1 | FileCheck %s --check-prefixes=CHECK,SLH
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; RUN: sed -e 's/SLHATTR//' %s | llc -verify-machineinstrs -mtriple=aarch64-none-linux-gnu 2>&1 | FileCheck %s --check-prefixes=CHECK,NOSLH
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; As SLH is falling back to a technique that doesn't use X16, we shouldn't see any warnings about clobbers.
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; (this would come from f_clobbered_reg_w16, but warnings are first in the output)
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; CHECK-NOT: warning: inline asm clobber list contains reserved registers: W16
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; CHECK-NOT: warning: inline asm clobber list contains reserved registers: X16
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declare i64 @g(i64, i64) local_unnamed_addr
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define i64 @f_using_reserved_reg_x16(i64 %a, i64 %b) local_unnamed_addr SLHATTR {
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; CHECK-LABEL: f_using_reserved_reg_x16
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; SLH: dsb sy
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; SLH: isb
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; NOSLH-NOT: dsb sy
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; NOSLH-NOT: isb
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entry:
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%cmp = icmp ugt i64 %a, %b
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br i1 %cmp, label %if.then, label %cleanup
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; CHECK: b.ls
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; SLH: dsb sy
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; SLH: isb
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; NOSLH-NOT: dsb sy
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; NOSLH-NOT: isb
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if.then:
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%0 = tail call i64 asm "hint #12", "={x17},{x16},0"(i64 %b, i64 %a)
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; CHECK: bl g
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; SLH: dsb sy
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; SLH: isb
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; NOSLH-NOT: dsb sy
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; NOSLH-NOT: isb
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; CHECK: ret
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%call = tail call i64 @g(i64 %a, i64 %b) #3
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%add = add i64 %call, %0
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br label %cleanup
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cleanup:
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; SLH: dsb sy
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; SLH: isb
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; NOSLH-NOT: dsb sy
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; NOSLH-NOT: isb
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; SLH: ret
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%retval.0 = phi i64 [ %add, %if.then ], [ %b, %entry ]
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ret i64 %retval.0
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}
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define i32 @f_clobbered_reg_w16(i32 %a, i32 %b) local_unnamed_addr SLHATTR {
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; CHECK-LABEL: f_clobbered_reg_w16
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entry:
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; SLH: dsb sy
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; SLH: isb
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; NOSLH-NOT: dsb sy
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; NOSLH-NOT: isb
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%cmp = icmp sgt i32 %a, %b
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br i1 %cmp, label %if.then, label %if.end
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; CHECK: b.le
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if.then:
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; SLH: dsb sy
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; SLH: isb
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; NOSLH-NOT: dsb sy
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; NOSLH-NOT: isb
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; CHECK: mov w16, w0
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tail call void asm sideeffect "mov w16, ${0:w}", "r,~{w16}"(i32 %a)
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br label %if.end
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; SLH: ret
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if.end:
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%add = add nsw i32 %b, %a
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ret i32 %add
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; SLH: dsb sy
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; SLH: isb
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; NOSLH-NOT: dsb sy
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; NOSLH-NOT: isb
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; SLH: ret
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}
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