derek.holloway
7502bf64a4
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211 lines
7.5 KiB
YAML
211 lines
7.5 KiB
YAML
# RUN: llc -verify-machineinstrs -mtriple=aarch64-none-linux-gnu \
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# RUN: -start-before aarch64-sls-hardening -o - %s \
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# RUN: -asm-verbose=0 \
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# RUN: | FileCheck %s \
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# RUN: --implicit-check-not=__llvm_slsblr_thunk_aa_x5_x8 \
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# RUN: --implicit-check-not=__llvm_slsblr_thunk_ab_x5_x8 \
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# RUN: --implicit-check-not=__llvm_slsblr_thunk_aaz_x5 \
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# RUN: --implicit-check-not=__llvm_slsblr_thunk_abz_x5
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# Pointer Authentication extension introduces more branch-with-link-to-register
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# instructions for the BLR SLS hardening to handle, namely BLRAA, BLRAB, BLRAAZ
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# and BLRABZ. Unlike the non-authenticating BLR instruction, BLRAA and BLRAB
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# accept two register operands (almost 900 combinations for each instruction).
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# For that reason, it is not practical to create all possible thunks.
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# Check that the BLR SLS hardening transforms BLRA* instructions into
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# unconditional BL calls to the correct thunk functions.
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# Check that only relevant thunk functions are generated.
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--- |
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define void @test_instructions() #0 {
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entry:
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ret void
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}
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define void @test_no_redef() #0 {
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entry:
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ret void
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}
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define void @test_regs() #0 {
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entry:
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ret void
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}
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attributes #0 = { "target-features"="+pauth,+harden-sls-blr" }
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...
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# Test that all BLRA* instructions are handled.
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---
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name: test_instructions
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $lr, $x0, $x1, $x2, $x3
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BLRAA $x0, $x1, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w0
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BLRAB $x1, $x2, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w0
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BLRAAZ $x2, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w0
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BLRABZ $x3, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w0
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RET undef $lr
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...
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# Test that the same thunk function is not created twice.
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---
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name: test_no_redef
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $lr, $x0, $x1, $x2, $x3, $x4
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; thunk used by @test_instructions
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BLRAB $x1, $x2, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w0
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; thunk used by this function twice
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BLRAB $x3, $x4, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w0
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BLRAB $x3, $x4, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w0
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RET undef $lr
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...
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# Test that all xN registers (except x16, x17, x30 and xzr) are handled.
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---
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name: test_regs
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tracksRegLiveness: true
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body: |
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bb.0.entry:
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liveins: $lr, $x0, $x1, $x2, $x3, $x4, $x5, $x6, $x7, $x8, $x9, $x10, $x11, $x12, $x13, $x14, $x15, $x16, $x17, $x18, $x19, $x20, $x21, $x22, $x23, $x24, $x25, $x26, $x27, $x28, $fp
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BLRAA $x0, $x1, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w0
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BLRAA $x2, $x3, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w0
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BLRAA $x4, $x5, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w0
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BLRAA $x6, $x7, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w0
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BLRAA $x8, $x9, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w0
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BLRAA $x10, $x11, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w0
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BLRAA $x12, $x13, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w0
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BLRAA $x14, $x15, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w0
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; skipping x16 and x17
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BLRAA $x18, $x19, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w0
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BLRAA $x20, $x21, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w0
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BLRAA $x22, $x23, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w0
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BLRAA $x24, $x25, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w0
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BLRAA $x26, $x27, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w0
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BLRAA $x28, $fp, implicit-def $lr, implicit $sp, implicit-def $sp, implicit-def $w0
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RET undef $lr
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...
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# CHECK-LABEL: test_instructions:
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# CHECK-NEXT: .cfi_startproc
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# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x0_x1
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# CHECK-NEXT: bl __llvm_slsblr_thunk_ab_x1_x2
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# CHECK-NEXT: bl __llvm_slsblr_thunk_aaz_x2
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# CHECK-NEXT: bl __llvm_slsblr_thunk_abz_x3
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# CHECK-NEXT: ret
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# CHECK-LABEL: test_no_redef:
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# CHECK-NEXT: .cfi_startproc
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# CHECK-NEXT: bl __llvm_slsblr_thunk_ab_x1_x2
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# CHECK-NEXT: bl __llvm_slsblr_thunk_ab_x3_x4
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# CHECK-NEXT: bl __llvm_slsblr_thunk_ab_x3_x4
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# CHECK-NEXT: ret
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# CHECK-LABEL: test_regs:
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# CHECK-NEXT: .cfi_startproc
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# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x0_x1
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# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x2_x3
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# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x4_x5
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# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x6_x7
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# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x8_x9
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# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x10_x11
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# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x12_x13
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# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x14_x15
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# skipping x16 and x17
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# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x18_x19
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# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x20_x21
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# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x22_x23
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# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x24_x25
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# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x26_x27
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# CHECK-NEXT: bl __llvm_slsblr_thunk_aa_x28_x29
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# CHECK-NEXT: ret
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# CHECK-LABEL: __llvm_slsblr_thunk_aa_x0_x1:
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# CHECK-NEXT: mov x16, x0
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# CHECK-NEXT: braa x16, x1
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# CHECK-NEXT: dsb sy
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# CHECK-NEXT: isb
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# CHECK-LABEL: __llvm_slsblr_thunk_ab_x1_x2:
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# CHECK-NEXT: mov x16, x1
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# CHECK-NEXT: brab x16, x2
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# CHECK-NEXT: dsb sy
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# CHECK-NEXT: isb
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# CHECK-LABEL: __llvm_slsblr_thunk_aaz_x2:
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# CHECK-NEXT: mov x16, x2
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# CHECK-NEXT: braaz x16
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# CHECK-NEXT: dsb sy
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# CHECK-NEXT: isb
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# CHECK-LABEL: __llvm_slsblr_thunk_abz_x3:
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# CHECK-NEXT: mov x16, x3
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# CHECK-NEXT: brabz x16
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# CHECK-NEXT: dsb sy
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# CHECK-NEXT: isb
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# The instruction *operands* should correspond to the thunk function *name*
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# (check that the name is parsed correctly when populating the thunk).
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# CHECK-LABEL: __llvm_slsblr_thunk_aa_x2_x3:
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# CHECK-NEXT: mov x16, x2
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# CHECK: braa x16, x3
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# CHECK-LABEL: __llvm_slsblr_thunk_aa_x4_x5:
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# CHECK-NEXT: mov x16, x4
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# CHECK: braa x16, x5
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# CHECK-LABEL: __llvm_slsblr_thunk_aa_x6_x7:
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# CHECK-NEXT: mov x16, x6
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# CHECK: braa x16, x7
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# CHECK-LABEL: __llvm_slsblr_thunk_aa_x8_x9:
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# CHECK-NEXT: mov x16, x8
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# CHECK: braa x16, x9
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# CHECK-LABEL: __llvm_slsblr_thunk_aa_x10_x11:
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# CHECK-NEXT: mov x16, x10
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# CHECK: braa x16, x11
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# CHECK-LABEL: __llvm_slsblr_thunk_aa_x12_x13:
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# CHECK-NEXT: mov x16, x12
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# CHECK: braa x16, x13
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# CHECK-LABEL: __llvm_slsblr_thunk_aa_x14_x15:
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# CHECK-NEXT: mov x16, x14
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# CHECK: braa x16, x15
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# skipping x16 and x17
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# CHECK-LABEL: __llvm_slsblr_thunk_aa_x18_x19:
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# CHECK-NEXT: mov x16, x18
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# CHECK: braa x16, x19
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# CHECK-LABEL: __llvm_slsblr_thunk_aa_x20_x21:
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# CHECK-NEXT: mov x16, x20
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# CHECK: braa x16, x21
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# CHECK-LABEL: __llvm_slsblr_thunk_aa_x22_x23:
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# CHECK-NEXT: mov x16, x22
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# CHECK: braa x16, x23
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# CHECK-LABEL: __llvm_slsblr_thunk_aa_x24_x25:
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# CHECK-NEXT: mov x16, x24
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# CHECK: braa x16, x25
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# CHECK-LABEL: __llvm_slsblr_thunk_aa_x26_x27:
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# CHECK-NEXT: mov x16, x26
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# CHECK: braa x16, x27
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# CHECK-LABEL: __llvm_slsblr_thunk_aa_x28_x29:
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# CHECK-NEXT: mov x16, x28
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# CHECK: braa x16, x29
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