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TheRock/compiler/amd-llvm/llvm/test/CodeGen/AArch64/srem-vec-crash.ll
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Flatten subprojects into a single base monorepo
2026-09-02 16:34:47 -07:00

33 lines
1023 B
LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 4
; RUN: llc -mtriple=aarch64-unknown-unknown < %s | FileCheck %s --check-prefixes=CHECK,CHECK-SD
; RUN: llc -mtriple=aarch64-unknown-unknown -global-isel < %s | FileCheck %s --check-prefixes=CHECK,CHECK-GI
define i32 @pr84830(i1 %arg) {
; CHECK-LABEL: pr84830:
; CHECK: // %bb.0: // %bb
; CHECK-NEXT: mov w0, #1 // =0x1
; CHECK-NEXT: ret
bb:
%new0 = srem i1 %arg, true
%last = zext i1 %new0 to i32
%i = icmp ne i32 %last, 0
%i1 = select i1 %i, i32 0, i32 1
ret i32 %i1
}
define i32 @pr84830_u(i1 %arg) {
; CHECK-LABEL: pr84830_u:
; CHECK: // %bb.0: // %bb
; CHECK-NEXT: mov w0, #1 // =0x1
; CHECK-NEXT: ret
bb:
%new0 = urem i1 %arg, true
%last = zext i1 %new0 to i32
%i = icmp ne i32 %last, 0
%i1 = select i1 %i, i32 0, i32 1
ret i32 %i1
}
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
; CHECK-GI: {{.*}}
; CHECK-SD: {{.*}}