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TheRock/compiler/amd-llvm/llvm/test/CodeGen/AArch64/sve-saddv_64.ll
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2026-09-02 16:34:47 -07:00

23 lines
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LLVM

; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s
define noundef i64 @svaddv_SVBool_SVInt64_t(<vscale x 16 x i1> %a, <vscale x 2 x i64> %b) {
; CHECK-LABEL: svaddv_SVBool_SVInt64_t:
; CHECK: // %bb.0: // %entry
; CHECK-NEXT: //APP
; CHECK-NEXT: //NO_APP
; CHECK-NEXT: uaddv d0, p0, z0.d
; CHECK-NEXT: fmov x0, d0
; CHECK-NEXT: ret
entry:
%0 = tail call { <vscale x 16 x i1>, <vscale x 2 x i64> } asm sideeffect "", "=@3Upa,=w,0,1"(<vscale x 16 x i1> %a, <vscale x 2 x i64> %b)
%asmresult = extractvalue { <vscale x 16 x i1>, <vscale x 2 x i64> } %0, 0
%asmresult1 = extractvalue { <vscale x 16 x i1>, <vscale x 2 x i64> } %0, 1
%1 = tail call <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1> %asmresult)
%2 = tail call i64 @llvm.aarch64.sve.saddv.nxv2i64(<vscale x 2 x i1> %1, <vscale x 2 x i64> %asmresult1)
ret i64 %2
}
declare <vscale x 2 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv2i1(<vscale x 16 x i1>)
declare i64 @llvm.aarch64.sve.saddv.nxv2i64(<vscale x 2 x i1>, <vscale x 2 x i64>)