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67 lines
2.1 KiB
LLVM
67 lines
2.1 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64--linux-gnu -mattr=+sve < %s | FileCheck %s
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define <vscale x 16 x i8> @trunc_i16toi8(<vscale x 16 x i16> %in) {
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; CHECK-LABEL: trunc_i16toi8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: uzp1 z0.b, z0.b, z1.b
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; CHECK-NEXT: ret
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%out = trunc <vscale x 16 x i16> %in to <vscale x 16 x i8>
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ret <vscale x 16 x i8> %out
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}
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define <vscale x 16 x i8> @trunc_i32toi8(<vscale x 16 x i32> %in) {
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; CHECK-LABEL: trunc_i32toi8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: uzp1 z2.h, z2.h, z3.h
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; CHECK-NEXT: uzp1 z0.h, z0.h, z1.h
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; CHECK-NEXT: uzp1 z0.b, z0.b, z2.b
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; CHECK-NEXT: ret
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%out = trunc <vscale x 16 x i32> %in to <vscale x 16 x i8>
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ret <vscale x 16 x i8> %out
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}
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define <vscale x 8 x i16> @trunc_i32toi16(<vscale x 8 x i32> %in) {
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; CHECK-LABEL: trunc_i32toi16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: uzp1 z0.h, z0.h, z1.h
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; CHECK-NEXT: ret
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%out = trunc <vscale x 8 x i32> %in to <vscale x 8 x i16>
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ret <vscale x 8 x i16> %out
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}
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define <vscale x 4 x i32> @trunc_i64toi32(<vscale x 4 x i64> %in) {
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; CHECK-LABEL: trunc_i64toi32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: uzp1 z0.s, z0.s, z1.s
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; CHECK-NEXT: ret
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%out = trunc <vscale x 4 x i64> %in to <vscale x 4 x i32>
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ret <vscale x 4 x i32> %out
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}
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define <vscale x 8 x i16> @trunc_i64toi16(<vscale x 8 x i64> %in) {
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; CHECK-LABEL: trunc_i64toi16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: uzp1 z2.s, z2.s, z3.s
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; CHECK-NEXT: uzp1 z0.s, z0.s, z1.s
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; CHECK-NEXT: uzp1 z0.h, z0.h, z2.h
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; CHECK-NEXT: ret
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%out = trunc <vscale x 8 x i64> %in to <vscale x 8 x i16>
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ret <vscale x 8 x i16> %out
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}
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define <vscale x 16 x i8> @trunc_i64toi8(<vscale x 16 x i64> %in) {
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; CHECK-LABEL: trunc_i64toi8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: uzp1 z6.s, z6.s, z7.s
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; CHECK-NEXT: uzp1 z4.s, z4.s, z5.s
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; CHECK-NEXT: uzp1 z2.s, z2.s, z3.s
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; CHECK-NEXT: uzp1 z0.s, z0.s, z1.s
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; CHECK-NEXT: uzp1 z1.h, z4.h, z6.h
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; CHECK-NEXT: uzp1 z0.h, z0.h, z2.h
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; CHECK-NEXT: uzp1 z0.b, z0.b, z1.b
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; CHECK-NEXT: ret
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%out = trunc <vscale x 16 x i64> %in to <vscale x 16 x i8>
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ret <vscale x 16 x i8> %out
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}
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