derek.holloway
7502bf64a4
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244 lines
7.8 KiB
LLVM
244 lines
7.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve < %s | FileCheck %s
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve,+disable-unpredicated-ld-st-lower < %s | FileCheck --check-prefixes=COMMON-NO-UPLS-LOWER,NO-UPLS-LOWER %s
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; RUN: llc -mtriple=aarch64-linux-gnu -mcpu=a64fx < %s | FileCheck --check-prefixes=COMMON-NO-UPLS-LOWER,A64FX %s
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; ST1B
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define void @st1b_lower_bound(<vscale x 16 x i8> %data, ptr %a) {
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; CHECK-LABEL: st1b_lower_bound:
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; CHECK: // %bb.0:
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; CHECK-NEXT: str z0, [x0, #-8, mul vl]
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; CHECK-NEXT: ret
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;
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; COMMON-NO-UPLS-LOWER-LABEL: st1b_lower_bound:
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; COMMON-NO-UPLS-LOWER: // %bb.0:
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; COMMON-NO-UPLS-LOWER-NEXT: ptrue p0.b
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; COMMON-NO-UPLS-LOWER-NEXT: st1b { z0.b }, p0, [x0, #-8, mul vl]
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; COMMON-NO-UPLS-LOWER-NEXT: ret
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%base = getelementptr <vscale x 16 x i8>, ptr %a, i64 -8
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store <vscale x 16 x i8> %data, ptr %base
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ret void
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}
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define void @st1b_inbound(<vscale x 16 x i8> %data, ptr %a) {
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; CHECK-LABEL: st1b_inbound:
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; CHECK: // %bb.0:
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; CHECK-NEXT: str z0, [x0, #1, mul vl]
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; CHECK-NEXT: ret
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;
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; COMMON-NO-UPLS-LOWER-LABEL: st1b_inbound:
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; COMMON-NO-UPLS-LOWER: // %bb.0:
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; COMMON-NO-UPLS-LOWER-NEXT: ptrue p0.b
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; COMMON-NO-UPLS-LOWER-NEXT: st1b { z0.b }, p0, [x0, #1, mul vl]
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; COMMON-NO-UPLS-LOWER-NEXT: ret
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%base = getelementptr <vscale x 16 x i8>, ptr %a, i64 1
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store <vscale x 16 x i8> %data, ptr %base
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ret void
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}
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define void @st1b_upper_bound(<vscale x 16 x i8> %data, ptr %a) {
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; CHECK-LABEL: st1b_upper_bound:
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; CHECK: // %bb.0:
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; CHECK-NEXT: str z0, [x0, #7, mul vl]
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; CHECK-NEXT: ret
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;
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; COMMON-NO-UPLS-LOWER-LABEL: st1b_upper_bound:
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; COMMON-NO-UPLS-LOWER: // %bb.0:
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; COMMON-NO-UPLS-LOWER-NEXT: ptrue p0.b
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; COMMON-NO-UPLS-LOWER-NEXT: st1b { z0.b }, p0, [x0, #7, mul vl]
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; COMMON-NO-UPLS-LOWER-NEXT: ret
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%base = getelementptr <vscale x 16 x i8>, ptr %a, i64 7
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store <vscale x 16 x i8> %data, ptr %base
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ret void
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}
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define void @st1b_out_of_upper_bound(<vscale x 16 x i8> %data, ptr %a) {
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; CHECK-LABEL: st1b_out_of_upper_bound:
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; CHECK: // %bb.0:
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; CHECK-NEXT: str z0, [x0, #8, mul vl]
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; CHECK-NEXT: ret
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;
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; COMMON-NO-UPLS-LOWER-LABEL: st1b_out_of_upper_bound:
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; COMMON-NO-UPLS-LOWER: // %bb.0:
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; COMMON-NO-UPLS-LOWER-NEXT: ptrue p0.b
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; COMMON-NO-UPLS-LOWER-NEXT: rdvl x8, #8
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; COMMON-NO-UPLS-LOWER-NEXT: st1b { z0.b }, p0, [x0, x8]
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; COMMON-NO-UPLS-LOWER-NEXT: ret
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%base = getelementptr <vscale x 16 x i8>, ptr %a, i64 8
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store <vscale x 16 x i8> %data, ptr %base
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ret void
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}
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define void @st1b_out_of_lower_bound(<vscale x 16 x i8> %data, ptr %a) {
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; CHECK-LABEL: st1b_out_of_lower_bound:
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; CHECK: // %bb.0:
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; CHECK-NEXT: str z0, [x0, #-9, mul vl]
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; CHECK-NEXT: ret
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;
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; COMMON-NO-UPLS-LOWER-LABEL: st1b_out_of_lower_bound:
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; COMMON-NO-UPLS-LOWER: // %bb.0:
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; COMMON-NO-UPLS-LOWER-NEXT: ptrue p0.b
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; COMMON-NO-UPLS-LOWER-NEXT: rdvl x8, #-9
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; COMMON-NO-UPLS-LOWER-NEXT: st1b { z0.b }, p0, [x0, x8]
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; COMMON-NO-UPLS-LOWER-NEXT: ret
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%base = getelementptr <vscale x 16 x i8>, ptr %a, i64 -9
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store <vscale x 16 x i8> %data, ptr %base
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ret void
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}
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; ST1H
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define void @st1h_inbound(<vscale x 8 x i16> %data, ptr %a) {
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; CHECK-LABEL: st1h_inbound:
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; CHECK: // %bb.0:
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; CHECK-NEXT: str z0, [x0, #-6, mul vl]
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; CHECK-NEXT: ret
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;
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; COMMON-NO-UPLS-LOWER-LABEL: st1h_inbound:
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; COMMON-NO-UPLS-LOWER: // %bb.0:
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; COMMON-NO-UPLS-LOWER-NEXT: ptrue p0.h
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; COMMON-NO-UPLS-LOWER-NEXT: st1h { z0.h }, p0, [x0, #-6, mul vl]
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; COMMON-NO-UPLS-LOWER-NEXT: ret
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%base = getelementptr <vscale x 8 x i16>, ptr %a, i64 -6
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store <vscale x 8 x i16> %data, ptr %base
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ret void
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}
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; ST1W
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define void @st1w_inbound(<vscale x 4 x i32> %data, ptr %a) {
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; CHECK-LABEL: st1w_inbound:
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; CHECK: // %bb.0:
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; CHECK-NEXT: str z0, [x0, #2, mul vl]
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; CHECK-NEXT: ret
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;
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; COMMON-NO-UPLS-LOWER-LABEL: st1w_inbound:
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; COMMON-NO-UPLS-LOWER: // %bb.0:
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; COMMON-NO-UPLS-LOWER-NEXT: ptrue p0.s
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; COMMON-NO-UPLS-LOWER-NEXT: st1w { z0.s }, p0, [x0, #2, mul vl]
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; COMMON-NO-UPLS-LOWER-NEXT: ret
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%base = getelementptr <vscale x 4 x i32>, ptr %a, i64 2
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store <vscale x 4 x i32> %data, ptr %base
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ret void
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}
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; ST1D
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define void @st1d_inbound(<vscale x 2 x i64> %data, ptr %a) {
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; CHECK-LABEL: st1d_inbound:
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; CHECK: // %bb.0:
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; CHECK-NEXT: str z0, [x0, #5, mul vl]
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; CHECK-NEXT: ret
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;
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; COMMON-NO-UPLS-LOWER-LABEL: st1d_inbound:
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; COMMON-NO-UPLS-LOWER: // %bb.0:
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; COMMON-NO-UPLS-LOWER-NEXT: ptrue p0.d
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; COMMON-NO-UPLS-LOWER-NEXT: st1d { z0.d }, p0, [x0, #5, mul vl]
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; COMMON-NO-UPLS-LOWER-NEXT: ret
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%base = getelementptr <vscale x 2 x i64>, ptr %a, i64 5
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store <vscale x 2 x i64> %data, ptr %base
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ret void
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}
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; Splat stores of unpacked FP scalable vectors
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define void @store_nxv2f32(ptr %out) {
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; CHECK-LABEL: store_nxv2f32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fmov z0.s, #1.00000000
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; CHECK-NEXT: ptrue p0.d
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; CHECK-NEXT: st1w { z0.d }, p0, [x0]
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; CHECK-NEXT: ret
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;
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; COMMON-NO-UPLS-LOWER-LABEL: store_nxv2f32:
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; COMMON-NO-UPLS-LOWER: // %bb.0:
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; COMMON-NO-UPLS-LOWER-NEXT: fmov z0.s, #1.00000000
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; COMMON-NO-UPLS-LOWER-NEXT: ptrue p0.d
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; COMMON-NO-UPLS-LOWER-NEXT: st1w { z0.d }, p0, [x0]
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; COMMON-NO-UPLS-LOWER-NEXT: ret
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store <vscale x 2 x float> splat(float 1.0), ptr %out
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ret void
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}
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define void @store_nxv4f16(ptr %out) {
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; CHECK-LABEL: store_nxv4f16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fmov z0.h, #1.00000000
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: st1h { z0.s }, p0, [x0]
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; CHECK-NEXT: ret
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;
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; COMMON-NO-UPLS-LOWER-LABEL: store_nxv4f16:
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; COMMON-NO-UPLS-LOWER: // %bb.0:
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; COMMON-NO-UPLS-LOWER-NEXT: fmov z0.h, #1.00000000
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; COMMON-NO-UPLS-LOWER-NEXT: ptrue p0.s
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; COMMON-NO-UPLS-LOWER-NEXT: st1h { z0.s }, p0, [x0]
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; COMMON-NO-UPLS-LOWER-NEXT: ret
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store <vscale x 4 x half> splat(half 1.0), ptr %out
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ret void
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}
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; Splat stores of unusual FP scalable vector types
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define void @store_nxv6f32(ptr %out) {
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; CHECK-LABEL: store_nxv6f32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fmov z0.s, #1.00000000
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; CHECK-NEXT: ptrue p0.d
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; CHECK-NEXT: st1w { z0.d }, p0, [x0, #2, mul vl]
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; CHECK-NEXT: str z0, [x0]
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; CHECK-NEXT: ret
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;
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; NO-UPLS-LOWER-LABEL: store_nxv6f32:
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; NO-UPLS-LOWER: // %bb.0:
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; NO-UPLS-LOWER-NEXT: fmov z0.s, #1.00000000
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; NO-UPLS-LOWER-NEXT: ptrue p0.d
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; NO-UPLS-LOWER-NEXT: ptrue p1.s
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; NO-UPLS-LOWER-NEXT: st1w { z0.d }, p0, [x0, #2, mul vl]
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; NO-UPLS-LOWER-NEXT: st1w { z0.s }, p1, [x0]
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; NO-UPLS-LOWER-NEXT: ret
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;
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; A64FX-LABEL: store_nxv6f32:
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; A64FX: // %bb.0:
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; A64FX-NEXT: fmov z0.s, #1.00000000
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; A64FX-NEXT: ptrue p0.d
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; A64FX-NEXT: st1w { z0.d }, p0, [x0, #2, mul vl]
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; A64FX-NEXT: ptrue p0.s
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; A64FX-NEXT: st1w { z0.s }, p0, [x0]
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; A64FX-NEXT: ret
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store <vscale x 6 x float> splat(float 1.0), ptr %out
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ret void
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}
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define void @store_nxv12f16(ptr %out) {
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; CHECK-LABEL: store_nxv12f16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: fmov z0.h, #1.00000000
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: st1h { z0.s }, p0, [x0, #2, mul vl]
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; CHECK-NEXT: str z0, [x0]
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; CHECK-NEXT: ret
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;
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; NO-UPLS-LOWER-LABEL: store_nxv12f16:
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; NO-UPLS-LOWER: // %bb.0:
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; NO-UPLS-LOWER-NEXT: fmov z0.h, #1.00000000
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; NO-UPLS-LOWER-NEXT: ptrue p0.s
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; NO-UPLS-LOWER-NEXT: ptrue p1.h
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; NO-UPLS-LOWER-NEXT: st1h { z0.s }, p0, [x0, #2, mul vl]
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; NO-UPLS-LOWER-NEXT: st1h { z0.h }, p1, [x0]
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; NO-UPLS-LOWER-NEXT: ret
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;
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; A64FX-LABEL: store_nxv12f16:
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; A64FX: // %bb.0:
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; A64FX-NEXT: fmov z0.h, #1.00000000
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; A64FX-NEXT: ptrue p0.s
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; A64FX-NEXT: st1h { z0.s }, p0, [x0, #2, mul vl]
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; A64FX-NEXT: ptrue p0.h
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; A64FX-NEXT: st1h { z0.h }, p0, [x0]
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; A64FX-NEXT: ret
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store <vscale x 12 x half> splat(half 1.0), ptr %out
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ret void
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}
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