derek.holloway
7502bf64a4
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243 lines
6.3 KiB
LLVM
243 lines
6.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -enable-subreg-liveness -mattr=+sve -force-streaming-compatible < %s | FileCheck %s
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; RUN: llc -enable-subreg-liveness -mattr=+sme -force-streaming < %s | FileCheck %s
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; RUN: llc -enable-subreg-liveness -force-streaming-compatible < %s | FileCheck %s --check-prefix=NONEON-NOSVE
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target triple = "aarch64-unknown-linux-gnu"
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define i32 @f16_to_s32(half %x) {
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; CHECK-LABEL: f16_to_s32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: fcvtzs z0.s, p0/m, z0.h
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; CHECK-NEXT: fmov w0, s0
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; CHECK-NEXT: ret
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;
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; NONEON-NOSVE-LABEL: f16_to_s32:
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; NONEON-NOSVE: // %bb.0: // %entry
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; NONEON-NOSVE-NEXT: fcvt s0, h0
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; NONEON-NOSVE-NEXT: fcvtzs w0, s0
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; NONEON-NOSVE-NEXT: ret
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entry:
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%cvt = fptosi half %x to i32
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ret i32 %cvt
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}
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define i64 @f16_to_s64(half %x) {
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; CHECK-LABEL: f16_to_s64:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ptrue p0.d
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; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.h
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; CHECK-NEXT: fmov x0, d0
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; CHECK-NEXT: ret
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;
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; NONEON-NOSVE-LABEL: f16_to_s64:
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; NONEON-NOSVE: // %bb.0: // %entry
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; NONEON-NOSVE-NEXT: fcvt s0, h0
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; NONEON-NOSVE-NEXT: fcvtzs x0, s0
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; NONEON-NOSVE-NEXT: ret
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entry:
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%cvt = fptosi half %x to i64
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ret i64 %cvt
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}
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define i32 @f32_to_s32(float %x) {
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; CHECK-LABEL: f32_to_s32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: fcvtzs z0.s, p0/m, z0.s
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; CHECK-NEXT: fmov w0, s0
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; CHECK-NEXT: ret
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;
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; NONEON-NOSVE-LABEL: f32_to_s32:
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; NONEON-NOSVE: // %bb.0: // %entry
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; NONEON-NOSVE-NEXT: fcvtzs w0, s0
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; NONEON-NOSVE-NEXT: ret
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entry:
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%cvt = fptosi float %x to i32
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ret i32 %cvt
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}
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define i64 @f32_to_s64(float %x) {
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; CHECK-LABEL: f32_to_s64:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ptrue p0.d
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; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.s
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; CHECK-NEXT: fmov x0, d0
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; CHECK-NEXT: ret
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;
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; NONEON-NOSVE-LABEL: f32_to_s64:
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; NONEON-NOSVE: // %bb.0: // %entry
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; NONEON-NOSVE-NEXT: fcvtzs x0, s0
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; NONEON-NOSVE-NEXT: ret
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entry:
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%cvt = fptosi float %x to i64
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ret i64 %cvt
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}
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define i32 @f64_to_s32(double %x) {
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; CHECK-LABEL: f64_to_s32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fcvtzs w0, d0
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; CHECK-NEXT: ret
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;
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; NONEON-NOSVE-LABEL: f64_to_s32:
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; NONEON-NOSVE: // %bb.0: // %entry
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; NONEON-NOSVE-NEXT: fcvtzs w0, d0
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; NONEON-NOSVE-NEXT: ret
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entry:
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%cvt = fptosi double %x to i32
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ret i32 %cvt
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}
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define i64 @f64_to_s64(double %x) {
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; CHECK-LABEL: f64_to_s64:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ptrue p0.d
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; CHECK-NEXT: fcvtzs z0.d, p0/m, z0.d
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; CHECK-NEXT: fmov x0, d0
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; CHECK-NEXT: ret
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;
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; NONEON-NOSVE-LABEL: f64_to_s64:
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; NONEON-NOSVE: // %bb.0: // %entry
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; NONEON-NOSVE-NEXT: fcvtzs x0, d0
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; NONEON-NOSVE-NEXT: ret
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entry:
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%cvt = fptosi double %x to i64
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ret i64 %cvt
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}
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define i32 @f16_to_u32(half %x) {
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; CHECK-LABEL: f16_to_u32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: fcvtzu z0.s, p0/m, z0.h
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; CHECK-NEXT: fmov w0, s0
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; CHECK-NEXT: ret
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;
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; NONEON-NOSVE-LABEL: f16_to_u32:
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; NONEON-NOSVE: // %bb.0: // %entry
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; NONEON-NOSVE-NEXT: fcvt s0, h0
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; NONEON-NOSVE-NEXT: fcvtzu w0, s0
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; NONEON-NOSVE-NEXT: ret
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entry:
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%cvt = fptoui half %x to i32
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ret i32 %cvt
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}
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define i64 @f16_to_u64(half %x) {
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; CHECK-LABEL: f16_to_u64:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ptrue p0.d
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; CHECK-NEXT: fcvtzu z0.d, p0/m, z0.h
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; CHECK-NEXT: fmov x0, d0
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; CHECK-NEXT: ret
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;
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; NONEON-NOSVE-LABEL: f16_to_u64:
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; NONEON-NOSVE: // %bb.0: // %entry
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; NONEON-NOSVE-NEXT: fcvt s0, h0
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; NONEON-NOSVE-NEXT: fcvtzu x0, s0
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; NONEON-NOSVE-NEXT: ret
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entry:
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%cvt = fptoui half %x to i64
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ret i64 %cvt
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}
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define i32 @f32_to_u32(float %x) {
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; CHECK-LABEL: f32_to_u32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ptrue p0.s
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; CHECK-NEXT: fcvtzu z0.s, p0/m, z0.s
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; CHECK-NEXT: fmov w0, s0
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; CHECK-NEXT: ret
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;
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; NONEON-NOSVE-LABEL: f32_to_u32:
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; NONEON-NOSVE: // %bb.0: // %entry
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; NONEON-NOSVE-NEXT: fcvtzu w0, s0
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; NONEON-NOSVE-NEXT: ret
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entry:
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%cvt = fptoui float %x to i32
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ret i32 %cvt
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}
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define i64 @f32_to_u64(float %x) {
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; CHECK-LABEL: f32_to_u64:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ptrue p0.d
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; CHECK-NEXT: fcvtzu z0.d, p0/m, z0.s
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; CHECK-NEXT: fmov x0, d0
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; CHECK-NEXT: ret
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;
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; NONEON-NOSVE-LABEL: f32_to_u64:
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; NONEON-NOSVE: // %bb.0: // %entry
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; NONEON-NOSVE-NEXT: fcvtzu x0, s0
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; NONEON-NOSVE-NEXT: ret
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entry:
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%cvt = fptoui float %x to i64
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ret i64 %cvt
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}
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define i32 @f64_to_u32(double %x) {
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; CHECK-LABEL: f64_to_u32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fcvtzu w0, d0
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; CHECK-NEXT: ret
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;
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; NONEON-NOSVE-LABEL: f64_to_u32:
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; NONEON-NOSVE: // %bb.0: // %entry
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; NONEON-NOSVE-NEXT: fcvtzu w0, d0
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; NONEON-NOSVE-NEXT: ret
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entry:
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%cvt = fptoui double %x to i32
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ret i32 %cvt
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}
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define i64 @f64_to_u64(double %x) {
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; CHECK-LABEL: f64_to_u64:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: ptrue p0.d
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; CHECK-NEXT: fcvtzu z0.d, p0/m, z0.d
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; CHECK-NEXT: fmov x0, d0
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; CHECK-NEXT: ret
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;
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; NONEON-NOSVE-LABEL: f64_to_u64:
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; NONEON-NOSVE: // %bb.0: // %entry
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; NONEON-NOSVE-NEXT: fcvtzu x0, d0
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; NONEON-NOSVE-NEXT: ret
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entry:
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%cvt = fptoui double %x to i64
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ret i64 %cvt
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}
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define i32 @strict_convert_signed(double %x) {
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; CHECK-LABEL: strict_convert_signed:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fcvtzs w0, d0
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; CHECK-NEXT: ret
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;
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; NONEON-NOSVE-LABEL: strict_convert_signed:
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; NONEON-NOSVE: // %bb.0: // %entry
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; NONEON-NOSVE-NEXT: fcvtzs w0, d0
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; NONEON-NOSVE-NEXT: ret
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entry:
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%cvt = call i32 @llvm.experimental.constrained.fptosi.i32.f64(double %x, metadata !"fpexcept.strict") #0
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ret i32 %cvt
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}
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define i32 @strict_convert_unsigned(float %x) {
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; CHECK-LABEL: strict_convert_unsigned:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fcvtzu w0, s0
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; CHECK-NEXT: ret
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;
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; NONEON-NOSVE-LABEL: strict_convert_unsigned:
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; NONEON-NOSVE: // %bb.0: // %entry
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; NONEON-NOSVE-NEXT: fcvtzu w0, s0
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; NONEON-NOSVE-NEXT: ret
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entry:
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%cvt = call i32 @llvm.experimental.constrained.fptoui.i32.f32(float %x, metadata !"fpexcept.strict") #0
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ret i32 %cvt
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}
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attributes #0 = { strictfp }
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