derek.holloway
7502bf64a4
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31 lines
1.2 KiB
LLVM
31 lines
1.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -enable-subreg-liveness -mattr=+sve -force-streaming-compatible < %s | FileCheck %s
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; RUN: llc -enable-subreg-liveness -mattr=+sme -force-streaming < %s | FileCheck %s
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target triple = "aarch64-unknown-linux-gnu"
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; == Matching first N elements ==
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define <4 x i1> @reshuffle_v4i1_nxv4i1(<vscale x 4 x i1> %a) {
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; CHECK-LABEL: reshuffle_v4i1_nxv4i1:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov z0.s, p0/z, #1 // =0x1
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; CHECK-NEXT: mov z1.s, z0.s[3]
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; CHECK-NEXT: mov z2.s, z0.s[2]
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; CHECK-NEXT: mov z3.s, z0.s[1]
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; CHECK-NEXT: zip1 z1.h, z2.h, z1.h
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; CHECK-NEXT: zip1 z0.h, z0.h, z3.h
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; CHECK-NEXT: zip1 z0.s, z0.s, z1.s
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; CHECK-NEXT: ret
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%el0 = extractelement <vscale x 4 x i1> %a, i32 0
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%el1 = extractelement <vscale x 4 x i1> %a, i32 1
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%el2 = extractelement <vscale x 4 x i1> %a, i32 2
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%el3 = extractelement <vscale x 4 x i1> %a, i32 3
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%v0 = insertelement <4 x i1> poison, i1 %el0, i32 0
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%v1 = insertelement <4 x i1> %v0, i1 %el1, i32 1
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%v2 = insertelement <4 x i1> %v1, i1 %el2, i32 2
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%v3 = insertelement <4 x i1> %v2, i1 %el3, i32 3
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ret <4 x i1> %v3
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}
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