derek.holloway
7502bf64a4
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147 lines
6.0 KiB
LLVM
147 lines
6.0 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -enable-subreg-liveness -mattr=+sve -force-streaming-compatible < %s | FileCheck %s
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; RUN: llc -enable-subreg-liveness -mattr=+sme -force-streaming < %s | FileCheck %s
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; RUN: llc -enable-subreg-liveness -force-streaming-compatible < %s | FileCheck %s --check-prefix=NONEON-NOSVE
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target triple = "aarch64-unknown-linux-gnu"
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define void @hang_when_merging_stores_after_legalisation(ptr %a, <2 x i32> %b) {
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; CHECK-LABEL: hang_when_merging_stores_after_legalisation:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov z0.s, s0
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; CHECK-NEXT: ptrue p0.s, vl4
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; CHECK-NEXT: mov z1.d, z0.d
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; CHECK-NEXT: st2w { z0.s, z1.s }, p0, [x0]
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; CHECK-NEXT: ret
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;
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; NONEON-NOSVE-LABEL: hang_when_merging_stores_after_legalisation:
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; NONEON-NOSVE: // %bb.0:
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; NONEON-NOSVE-NEXT: sub sp, sp, #32
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; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 32
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; NONEON-NOSVE-NEXT: str d0, [sp, #8]
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; NONEON-NOSVE-NEXT: ldr w8, [sp, #8]
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; NONEON-NOSVE-NEXT: stp w8, w8, [sp, #24]
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; NONEON-NOSVE-NEXT: stp w8, w8, [sp, #16]
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; NONEON-NOSVE-NEXT: ldr q0, [sp, #16]
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; NONEON-NOSVE-NEXT: stp q0, q0, [x0]
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; NONEON-NOSVE-NEXT: add sp, sp, #32
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; NONEON-NOSVE-NEXT: ret
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%splat = shufflevector <2 x i32> %b, <2 x i32> poison, <8 x i32> zeroinitializer
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%interleaved.vec = shufflevector <8 x i32> %splat, <8 x i32> poison, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>
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store <8 x i32> %interleaved.vec, ptr %a, align 4
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ret void
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}
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define void @interleave_store_without_splat(ptr %a, <4 x i32> %v1, <4 x i32> %v2) {
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; CHECK-LABEL: interleave_store_without_splat:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.s, vl4
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; CHECK-NEXT: st2w { z0.s, z1.s }, p0, [x0]
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; CHECK-NEXT: ret
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;
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; NONEON-NOSVE-LABEL: interleave_store_without_splat:
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; NONEON-NOSVE: // %bb.0:
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; NONEON-NOSVE-NEXT: sub sp, sp, #64
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; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 64
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; NONEON-NOSVE-NEXT: stp q0, q1, [sp, #16]
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; NONEON-NOSVE-NEXT: ldr w9, [sp, #36]
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; NONEON-NOSVE-NEXT: ldr w8, [sp, #20]
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; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #8]
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; NONEON-NOSVE-NEXT: ldr w9, [sp, #32]
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; NONEON-NOSVE-NEXT: ldr w8, [sp, #16]
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; NONEON-NOSVE-NEXT: stp w8, w9, [sp]
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; NONEON-NOSVE-NEXT: ldr w9, [sp, #44]
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; NONEON-NOSVE-NEXT: ldr w8, [sp, #28]
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; NONEON-NOSVE-NEXT: ldr q1, [sp]
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; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #56]
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; NONEON-NOSVE-NEXT: ldr w9, [sp, #40]
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; NONEON-NOSVE-NEXT: ldr w8, [sp, #24]
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; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #48]
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; NONEON-NOSVE-NEXT: ldr q0, [sp, #48]
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; NONEON-NOSVE-NEXT: stp q1, q0, [x0]
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; NONEON-NOSVE-NEXT: add sp, sp, #64
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; NONEON-NOSVE-NEXT: ret
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%shuffle = shufflevector <4 x i32> %v1, <4 x i32> %v2, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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%interleaved = shufflevector <8 x i32> %shuffle, <8 x i32> poison, <8 x i32> <i32 0, i32 4, i32 1, i32 5, i32 2, i32 6, i32 3, i32 7>
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store <8 x i32> %interleaved, ptr %a, align 1
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ret void
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}
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define void @interleave_store_legalization(ptr %a, <8 x i32> %v1, <8 x i32> %v2) {
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; CHECK-LABEL: interleave_store_legalization:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov z5.d, z2.d
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; CHECK-NEXT: mov z4.d, z0.d
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; CHECK-NEXT: mov x8, #8 // =0x8
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; CHECK-NEXT: mov z2.d, z3.d
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; CHECK-NEXT: ptrue p0.s, vl4
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; CHECK-NEXT: st2w { z4.s, z5.s }, p0, [x0]
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; CHECK-NEXT: st2w { z1.s, z2.s }, p0, [x0, x8, lsl #2]
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; CHECK-NEXT: ret
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;
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; NONEON-NOSVE-LABEL: interleave_store_legalization:
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; NONEON-NOSVE: // %bb.0:
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; NONEON-NOSVE-NEXT: sub sp, sp, #128
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; NONEON-NOSVE-NEXT: .cfi_def_cfa_offset 128
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; NONEON-NOSVE-NEXT: stp q1, q3, [sp, #16]
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; NONEON-NOSVE-NEXT: stp q0, q2, [sp, #80]
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; NONEON-NOSVE-NEXT: ldr w9, [sp, #100]
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; NONEON-NOSVE-NEXT: ldr w8, [sp, #84]
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; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #72]
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; NONEON-NOSVE-NEXT: ldr w9, [sp, #96]
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; NONEON-NOSVE-NEXT: ldr w8, [sp, #80]
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; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #64]
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; NONEON-NOSVE-NEXT: ldr w9, [sp, #108]
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; NONEON-NOSVE-NEXT: ldr w8, [sp, #92]
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; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #120]
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; NONEON-NOSVE-NEXT: ldr w9, [sp, #104]
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; NONEON-NOSVE-NEXT: ldr w8, [sp, #88]
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; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #112]
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; NONEON-NOSVE-NEXT: ldr w9, [sp, #36]
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; NONEON-NOSVE-NEXT: ldr w8, [sp, #20]
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; NONEON-NOSVE-NEXT: ldr q3, [sp, #112]
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; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #8]
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; NONEON-NOSVE-NEXT: ldr w9, [sp, #32]
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; NONEON-NOSVE-NEXT: ldr w8, [sp, #16]
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; NONEON-NOSVE-NEXT: stp w8, w9, [sp]
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; NONEON-NOSVE-NEXT: ldr w9, [sp, #44]
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; NONEON-NOSVE-NEXT: ldr w8, [sp, #28]
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; NONEON-NOSVE-NEXT: ldr q1, [sp]
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; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #56]
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; NONEON-NOSVE-NEXT: ldr w9, [sp, #40]
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; NONEON-NOSVE-NEXT: ldr w8, [sp, #24]
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; NONEON-NOSVE-NEXT: stp w8, w9, [sp, #48]
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; NONEON-NOSVE-NEXT: ldp q0, q2, [sp, #48]
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; NONEON-NOSVE-NEXT: stp q2, q3, [x0]
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; NONEON-NOSVE-NEXT: stp q1, q0, [x0, #32]
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; NONEON-NOSVE-NEXT: add sp, sp, #128
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; NONEON-NOSVE-NEXT: ret
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%interleaved.vec = shufflevector <8 x i32> %v1, <8 x i32> %v2, <16 x i32> <i32 0, i32 8, i32 1, i32 9, i32 2, i32 10, i32 3, i32 11,
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i32 4, i32 12, i32 5, i32 13, i32 6, i32 14, i32 7, i32 15>
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store <16 x i32> %interleaved.vec, ptr %a, align 4
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ret void
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}
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; Ensure we don't crash when trying to lower a shuffle via an extract
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define void @crash_when_lowering_extract_shuffle(ptr %dst, i1 %cond) {
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; CHECK-LABEL: crash_when_lowering_extract_shuffle:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ret
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;
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; NONEON-NOSVE-LABEL: crash_when_lowering_extract_shuffle:
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; NONEON-NOSVE: // %bb.0:
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; NONEON-NOSVE-NEXT: ret
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%broadcast.splat = shufflevector <32 x i1> zeroinitializer, <32 x i1> zeroinitializer, <32 x i32> zeroinitializer
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br i1 %cond, label %exit, label %vector.body
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vector.body:
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%1 = load <32 x i32>, ptr %dst, align 16
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%predphi = select <32 x i1> %broadcast.splat, <32 x i32> zeroinitializer, <32 x i32> %1
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store <32 x i32> %predphi, ptr %dst, align 16
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br label %exit
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exit:
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ret void
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}
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