derek.holloway
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61 lines
2.9 KiB
LLVM
61 lines
2.9 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -mtriple=aarch64-linux-gnu -mattr=+sve -verify-machineinstrs < %s | FileCheck %s
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; Test that the select returns %true, because the predicate is all active.
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define <vscale x 4 x i32> @select_ptrue_fold_all_active(<vscale x 4 x i32> %false, <vscale x 4 x i32> %true) {
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; CHECK-LABEL: select_ptrue_fold_all_active:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov z0.d, z1.d
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; CHECK-NEXT: ret
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%p = call <vscale x 4 x i1> @llvm.aarch64.sve.ptrue.nxv4i1(i32 31)
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%res = select <vscale x 4 x i1> %p, <vscale x 4 x i32> %true, <vscale x 4 x i32> %false
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ret <vscale x 4 x i32> %res
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}
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; Test that the select returns %true, because the predicate is all active for vscale_range(2, 2)
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define <vscale x 4 x i32> @select_ptrue_fold_vl8(<vscale x 4 x i32> %false, <vscale x 4 x i32> %true) vscale_range(2, 2) {
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; CHECK-LABEL: select_ptrue_fold_vl8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov z0.d, z1.d
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; CHECK-NEXT: ret
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%p = call <vscale x 4 x i1> @llvm.aarch64.sve.ptrue.nxv4i1(i32 8)
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%res = select <vscale x 4 x i1> %p, <vscale x 4 x i32> %true, <vscale x 4 x i32> %false
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ret <vscale x 4 x i32> %res
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}
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define <vscale x 16 x i8> @select_ptrue_fold_all_inactive(<vscale x 16 x i8> %true, <vscale x 16 x i8> %false) {
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; CHECK-LABEL: select_ptrue_fold_all_inactive:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov z0.d, z1.d
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; CHECK-NEXT: ret
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%p = call <vscale x 16 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv16i1(<vscale x 16 x i1> zeroinitializer)
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%res = select <vscale x 16 x i1> %p, <vscale x 16 x i8> %true, <vscale x 16 x i8> %false
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ret <vscale x 16 x i8> %res
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}
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define <vscale x 4 x i32> @select_ptrue_fold_all_inactive_reinterpret(<vscale x 4 x i32> %true, <vscale x 4 x i32> %false) {
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; CHECK-LABEL: select_ptrue_fold_all_inactive_reinterpret:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov z0.d, z1.d
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; CHECK-NEXT: ret
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%p = call <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1> zeroinitializer)
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%res = select <vscale x 4 x i1> %p, <vscale x 4 x i32> %true, <vscale x 4 x i32> %false
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ret <vscale x 4 x i32> %res
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}
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; Test that the select remains, because predicate is not all active (only half lanes are set for vscale_range(2, 2))
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define <vscale x 4 x i32> @select_ptrue_no_fold_vl4(<vscale x 4 x i32> %true, <vscale x 4 x i32> %false) vscale_range(2, 2) {
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; CHECK-LABEL: select_ptrue_no_fold_vl4:
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; CHECK: // %bb.0:
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; CHECK-NEXT: ptrue p0.s, vl4
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; CHECK-NEXT: sel z0.s, p0, z0.s, z1.s
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; CHECK-NEXT: ret
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%p = call <vscale x 4 x i1> @llvm.aarch64.sve.ptrue.nxv4i1(i32 4)
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%res = select <vscale x 4 x i1> %p, <vscale x 4 x i32> %true, <vscale x 4 x i32> %false
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ret <vscale x 4 x i32> %res
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}
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declare <vscale x 4 x i1> @llvm.aarch64.sve.ptrue.nxv4i1(i32)
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declare <vscale x 4 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv4i1(<vscale x 16 x i1>)
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declare <vscale x 16 x i1> @llvm.aarch64.sve.convert.from.svbool.nxv16i1(<vscale x 16 x i1>)
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