derek.holloway
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110 lines
5.2 KiB
LLVM
110 lines
5.2 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+sve2,+lut -enable-subreg-liveness=true | FileCheck %s
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; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+sve,+sme2,+lut -enable-subreg-liveness=true | FileCheck %s
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; RUN: llc < %s -verify-machineinstrs -mtriple=aarch64-none-linux-gnu -mattr=+sme2,+lut --force-streaming -enable-subreg-liveness=true | FileCheck %s
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define <vscale x 16 x i8> @test_luti2_lane_i8(<vscale x 16 x i8> %table, <vscale x 16 x i8> %indices){
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; CHECK-LABEL: test_luti2_lane_i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: luti2 z0.b, { z0.b }, z1[0]
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; CHECK-NEXT: ret
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%res= tail call <vscale x 16 x i8> @llvm.aarch64.sve.luti2.lane.nxv16i8(<vscale x 16 x i8> %table, <vscale x 16 x i8> %indices, i32 0)
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ret <vscale x 16 x i8> %res
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}
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define <vscale x 8 x i16> @test_luti2_lane_i16(<vscale x 8 x i16> %table, <vscale x 16 x i8> %indices){
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; CHECK-LABEL: test_luti2_lane_i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: luti2 z0.h, { z0.h }, z1[0]
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; CHECK-NEXT: ret
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%res= tail call <vscale x 8 x i16> @llvm.aarch64.sve.luti2.lane.nxv8i16(<vscale x 8 x i16> %table, <vscale x 16 x i8> %indices, i32 0)
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ret <vscale x 8 x i16> %res
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}
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define <vscale x 8 x half> @test_luti2_lane_f16(<vscale x 8 x half> %table, <vscale x 16 x i8> %indices){
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; CHECK-LABEL: test_luti2_lane_f16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: luti2 z0.h, { z0.h }, z1[0]
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; CHECK-NEXT: ret
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%res= tail call <vscale x 8 x half> @llvm.aarch64.sve.luti2.lane.nxv8f16(<vscale x 8 x half> %table, <vscale x 16 x i8> %indices, i32 0)
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ret <vscale x 8 x half> %res
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}
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define <vscale x 8 x bfloat> @test_luti2_lane_bf16(<vscale x 8 x bfloat> %table, <vscale x 16 x i8> %indices){
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; CHECK-LABEL: test_luti2_lane_bf16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: luti2 z0.h, { z0.h }, z1[0]
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; CHECK-NEXT: ret
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%res= tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.luti2.lane.nxv8bf16(<vscale x 8 x bfloat> %table, <vscale x 16 x i8> %indices, i32 0)
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ret <vscale x 8 x bfloat> %res
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}
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define <vscale x 16 x i8> @test_luti4_lane_i8(<vscale x 16 x i8> %table, <vscale x 16 x i8> %indices){
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; CHECK-LABEL: test_luti4_lane_i8:
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; CHECK: // %bb.0:
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; CHECK-NEXT: luti4 z0.b, { z0.b }, z1[0]
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; CHECK-NEXT: ret
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%res= tail call <vscale x 16 x i8> @llvm.aarch64.sve.luti4.lane.nxv16i8(<vscale x 16 x i8> %table, <vscale x 16 x i8> %indices, i32 0)
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ret <vscale x 16 x i8> %res
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}
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define <vscale x 8 x i16> @test_luti4_lane_i16(<vscale x 8 x i16> %table, <vscale x 16 x i8> %indices){
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; CHECK-LABEL: test_luti4_lane_i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: luti4 z0.h, { z0.h }, z1[0]
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; CHECK-NEXT: ret
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%res= tail call <vscale x 8 x i16> @llvm.aarch64.sve.luti4.lane.nxv8i16(<vscale x 8 x i16> %table, <vscale x 16 x i8> %indices, i32 0)
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ret <vscale x 8 x i16> %res
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}
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define <vscale x 8 x half> @test_luti4_lane_f16(<vscale x 8 x half> %table, <vscale x 16 x i8> %indices){
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; CHECK-LABEL: test_luti4_lane_f16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: luti4 z0.h, { z0.h }, z1[0]
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; CHECK-NEXT: ret
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%res= tail call <vscale x 8 x half> @llvm.aarch64.sve.luti4.lane.nxv8f16(<vscale x 8 x half> %table, <vscale x 16 x i8> %indices, i32 0)
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ret <vscale x 8 x half> %res
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}
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define <vscale x 8 x bfloat> @test_luti4_lane_bf16(<vscale x 8 x bfloat> %table, <vscale x 16 x i8> %indices){
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; CHECK-LABEL: test_luti4_lane_bf16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: luti4 z0.h, { z0.h }, z1[0]
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; CHECK-NEXT: ret
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%res= tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.luti4.lane.nxv8bf16(<vscale x 8 x bfloat> %table, <vscale x 16 x i8> %indices, i32 0)
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ret <vscale x 8 x bfloat> %res
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}
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define <vscale x 8 x i16> @test_luti4_lane_i16_x2(<vscale x 8 x i16> %table, <vscale x 16 x i8> %indices){
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; CHECK-LABEL: test_luti4_lane_i16_x2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov z2.d, z0.d
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; CHECK-NEXT: mov z3.d, z0.d
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; CHECK-NEXT: luti4 z0.h, { z2.h, z3.h }, z1[0]
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; CHECK-NEXT: ret
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%res= tail call <vscale x 8 x i16> @llvm.aarch64.sve.luti4.lane.x2.nxv8i16(<vscale x 8 x i16> %table, <vscale x 8 x i16> %table, <vscale x 16 x i8> %indices, i32 0)
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ret <vscale x 8 x i16> %res
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}
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define <vscale x 8 x half> @test_luti4_lane_f16_x2(<vscale x 8 x half> %table, <vscale x 16 x i8> %indices){
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; CHECK-LABEL: test_luti4_lane_f16_x2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov z2.d, z0.d
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; CHECK-NEXT: mov z3.d, z0.d
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; CHECK-NEXT: luti4 z0.h, { z2.h, z3.h }, z1[0]
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; CHECK-NEXT: ret
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%res= tail call <vscale x 8 x half> @llvm.aarch64.sve.luti4.lane.x2.nxv8f16(<vscale x 8 x half> %table, <vscale x 8 x half> %table, <vscale x 16 x i8> %indices, i32 0)
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ret <vscale x 8 x half> %res
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}
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define <vscale x 8 x bfloat> @test_luti4_lane_bf16_x2(<vscale x 8 x bfloat> %table, <vscale x 16 x i8> %indices){
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; CHECK-LABEL: test_luti4_lane_bf16_x2:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov z2.d, z0.d
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; CHECK-NEXT: mov z3.d, z0.d
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; CHECK-NEXT: luti4 z0.h, { z2.h, z3.h }, z1[0]
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; CHECK-NEXT: ret
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%res= tail call <vscale x 8 x bfloat> @llvm.aarch64.sve.luti4.lane.x2.nxv8bf16(<vscale x 8 x bfloat> %table, <vscale x 8 x bfloat> %table, <vscale x 16 x i8> %indices, i32 0)
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ret <vscale x 8 x bfloat> %res
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}
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