derek.holloway
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79 lines
3.3 KiB
LLVM
79 lines
3.3 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 6
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; RUN: llc -mattr=+sve2 < %s | FileCheck %s --check-prefixes=CHECK,SVE2
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; RUN: llc -global-isel -global-isel-abort=2 -mattr=+sve2 < %s | FileCheck %s --check-prefixes=CHECK,SVE2
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; RUN: llc -mattr=+sve2p1 < %s | FileCheck %s --check-prefixes=CHECK,SVE2P1
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; RUN: llc -global-isel -global-isel-abort=2 -mattr=+sve2p1 < %s | FileCheck %s --check-prefixes=CHECK,SVE2P1
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target triple = "aarch64-linux-gnu"
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define <vscale x 4 x float> @fdot_wide_nxv4f32(<vscale x 4 x float> %acc, <vscale x 8 x half> %a, <vscale x 8 x half> %b) {
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; SVE2-LABEL: fdot_wide_nxv4f32:
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; SVE2: // %bb.0: // %entry
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; SVE2-NEXT: fmlalb z0.s, z1.h, z2.h
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; SVE2-NEXT: fmlalt z0.s, z1.h, z2.h
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; SVE2-NEXT: ret
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;
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; SVE2P1-LABEL: fdot_wide_nxv4f32:
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; SVE2P1: // %bb.0: // %entry
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; SVE2P1-NEXT: fdot z0.s, z1.h, z2.h
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; SVE2P1-NEXT: ret
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entry:
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%a.wide = fpext <vscale x 8 x half> %a to <vscale x 8 x float>
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%b.wide = fpext <vscale x 8 x half> %b to <vscale x 8 x float>
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%mult = fmul <vscale x 8 x float> %a.wide, %b.wide
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%partial.reduce = call <vscale x 4 x float> @llvm.vector.partial.reduce.fadd(<vscale x 4 x float> %acc, <vscale x 8 x float> %mult)
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ret <vscale x 4 x float> %partial.reduce
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}
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define <vscale x 4 x float> @fdot_splat_nxv4f32(<vscale x 4 x float> %acc, <vscale x 8 x half> %a) {
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; SVE2-LABEL: fdot_splat_nxv4f32:
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; SVE2: // %bb.0: // %entry
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; SVE2-NEXT: fmov z2.h, #1.00000000
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; SVE2-NEXT: fmlalb z0.s, z1.h, z2.h
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; SVE2-NEXT: fmlalt z0.s, z1.h, z2.h
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; SVE2-NEXT: ret
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;
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; SVE2P1-LABEL: fdot_splat_nxv4f32:
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; SVE2P1: // %bb.0: // %entry
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; SVE2P1-NEXT: fmov z2.h, #1.00000000
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; SVE2P1-NEXT: fdot z0.s, z1.h, z2.h
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; SVE2P1-NEXT: ret
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entry:
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%a.wide = fpext <vscale x 8 x half> %a to <vscale x 8 x float>
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%partial.reduce = call <vscale x 4 x float> @llvm.vector.partial.reduce.fadd(<vscale x 4 x float> %acc, <vscale x 8 x float> %a.wide)
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ret <vscale x 4 x float> %partial.reduce
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}
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define <vscale x 8 x half> @partial_reduce_nxv8f16(<vscale x 8 x half> %acc, <vscale x 16 x half> %a) {
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; CHECK-LABEL: partial_reduce_nxv8f16:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fadd z0.h, z0.h, z1.h
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; CHECK-NEXT: fadd z0.h, z0.h, z2.h
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; CHECK-NEXT: ret
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entry:
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%partial.reduce = call <vscale x 8 x half> @llvm.vector.partial.reduce.fadd(<vscale x 8 x half> %acc, <vscale x 16 x half> %a)
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ret <vscale x 8 x half> %partial.reduce
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}
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define <vscale x 4 x float> @partial_reduce_nxv4f32(<vscale x 4 x float> %acc, <vscale x 8 x float> %a) {
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; CHECK-LABEL: partial_reduce_nxv4f32:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fadd z0.s, z0.s, z1.s
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; CHECK-NEXT: fadd z0.s, z0.s, z2.s
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; CHECK-NEXT: ret
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entry:
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%partial.reduce = call <vscale x 4 x float> @llvm.vector.partial.reduce.fadd(<vscale x 4 x float> %acc, <vscale x 8 x float> %a)
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ret <vscale x 4 x float> %partial.reduce
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}
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define <vscale x 2 x double> @partial_reduce_nxv2f64(<vscale x 2 x double> %acc, <vscale x 4 x double> %a) {
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; CHECK-LABEL: partial_reduce_nxv2f64:
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; CHECK: // %bb.0: // %entry
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; CHECK-NEXT: fadd z0.d, z0.d, z1.d
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; CHECK-NEXT: fadd z0.d, z0.d, z2.d
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; CHECK-NEXT: ret
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entry:
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%partial.reduce = call <vscale x 2 x double> @llvm.vector.partial.reduce.fadd(<vscale x 2 x double> %acc, <vscale x 4 x double> %a)
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ret <vscale x 2 x double> %partial.reduce
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}
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