derek.holloway
7502bf64a4
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33 lines
1.3 KiB
LLVM
33 lines
1.3 KiB
LLVM
; RUN: llc -mtriple aarch64-unknown-windows-msvc -filetype asm %s -o - | FileCheck %s
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; Check that the slot offset of the async context (x22) doesn't
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; conflict with that of another callee-saved register (x21 here) and
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; saving it won't overwrite the saved value of the callee-saved
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; register.
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;
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; CHECK: sub sp, sp, #64
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; CHECK: str x19, [sp, #16]
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; CHECK: str x21, [sp, #24]
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; CHECK-NOT: stp x29, x30, [sp, #32]
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; CHECK: stp x29, x30, [sp, #40]
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; CHECK-NOT: str x22, [sp, #24]
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; CHECK: str x22, [sp, #32]
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declare ptr @llvm.swift.async.context.addr()
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declare swiftcc i64 @foo(i64 %0, i64 %1)
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declare swifttailcc void @tail(ptr swiftasync %0, ptr swiftself dereferenceable(8) %1, i64 %2)
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define internal swifttailcc void @test(ptr swiftasync %0, ptr swiftself %1, i64 %2) {
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entry:
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%3 = load ptr, ptr %0, align 8
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%4 = call ptr @llvm.swift.async.context.addr()
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store ptr %3, ptr %4, align 8
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%5 = call swiftcc i64 @foo(i64 %2, i64 %2)
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%6 = call swiftcc i64 @foo(i64 %2, i64 %5)
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%7 = call swiftcc i64 @foo(i64 %5, i64 %2)
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%8 = call swiftcc i64 @foo(i64 %7, i64 %6)
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%9 = call swiftcc i64 @foo(i64 %2, i64 %8)
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%10 = call ptr @llvm.swift.async.context.addr()
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musttail call swifttailcc void @tail(ptr swiftasync %10, ptr swiftself %1, i64 %2)
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ret void
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}
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