derek.holloway
7502bf64a4
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303 lines
8.1 KiB
YAML
Executable File
303 lines
8.1 KiB
YAML
Executable File
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 5
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# RUN: llc -verify-machineinstrs -mtriple aarch64-none-linux-gnu -run-pass early-tailduplication -o - %s | FileCheck %s
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# These tests used to hit verification failure due to register class
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# mismatches after tail dupilication (and the SSA form updates).
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# In test1 we have a simple case when the COPY already is duplicated, but
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# TailDuplication will try to eliminate the PHI in bb.2 by adding a new PHI in
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# bb.4. The presence of a PHI node in bb.4, which happens to assign to a
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# fpr32 register, was enough to mess up the result. The PHI node was reused
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# and the use of %2 in the CBNZW was changed into using %3 instead. But the
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# register class of %3 is not correct for CBNZW.
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# The fix involves adding a COPY instruction that moves the value to
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# a register of correct regclass.
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---
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name: test1
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: test1
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.4(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $x0 = COPY undef $x0, implicit-def %0
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; CHECK-NEXT: B %bb.4
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: successors: %bb.4(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $x0 = COPY undef $x0, implicit-def %1
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; CHECK-NEXT: B %bb.4
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.3:
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; CHECK-NEXT: successors: %bb.3(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: B %bb.3
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.4:
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; CHECK-NEXT: successors: %bb.5(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[PHI:%[0-9]+]]:fpr32 = PHI %0, %bb.0, %1, %bb.1
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY [[PHI]]
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; CHECK-NEXT: $x0 = COPY undef $x0, implicit [[PHI]]
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; CHECK-NEXT: CBNZW [[COPY]], %bb.5
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.5:
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bb.0:
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$x0 = COPY undef $x0, implicit-def %0:gpr32
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B %bb.2
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bb.1:
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$x0 = COPY undef $x0, implicit-def %1:gpr32
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bb.2:
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%2:gpr32 = PHI %1, %bb.1, %0, %bb.0
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B %bb.4
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bb.3:
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B %bb.3
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bb.4:
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%3:fpr32 = PHI %2, %bb.2
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$x0 = COPY undef $x0, implicit %3:fpr32
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CBNZW %2, %bb.5
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bb.5:
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...
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# In test2 there are two PHIs already present, one with the wanted register
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# class. No idea if this is a common scenario in reality (hand written mir
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# test case).
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# FIXME: Can we pick the best PHI directly instead of getting a COPY from the
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# one with wrong register class?
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---
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name: test2
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: test2
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.4(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $x0 = COPY undef $x0, implicit-def %0
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; CHECK-NEXT: B %bb.4
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: successors: %bb.4(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $x0 = COPY undef $x0, implicit-def %1
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; CHECK-NEXT: B %bb.4
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.3:
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; CHECK-NEXT: successors: %bb.3(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: B %bb.3
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.4:
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; CHECK-NEXT: successors: %bb.5(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[PHI:%[0-9]+]]:fpr32 = PHI %0, %bb.0, %1, %bb.1
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; CHECK-NEXT: [[PHI1:%[0-9]+]]:gpr32 = PHI %0, %bb.0, %1, %bb.1
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY [[PHI]]
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; CHECK-NEXT: CBNZW [[COPY]], %bb.5
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.5:
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; CHECK-NEXT: $x0 = COPY undef $x0, implicit [[PHI]]
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bb.0:
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$x0 = COPY undef $x0, implicit-def %0:gpr32
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B %bb.2
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bb.1:
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$x0 = COPY undef $x0, implicit-def %1:gpr32
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bb.2:
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%2:gpr32 = PHI %1, %bb.1, %0, %bb.0
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B %bb.4
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bb.3:
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B %bb.3
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bb.4:
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%3:fpr32 = PHI %2, %bb.2
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%4:gpr32 = PHI %2, %bb.2
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CBNZW %2, %bb.5
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bb.5:
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$x0 = COPY undef $x0, implicit %3:fpr32
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...
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# In test3 we have multiple uses, and in multiple BBs. This test is to show
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# that we get one COPY instruction inserted for each BB where there is a use.
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---
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name: test3
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: test3
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.4(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $x0 = COPY undef $x0, implicit-def %0
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; CHECK-NEXT: B %bb.4
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: successors: %bb.4(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $x0 = COPY undef $x0, implicit-def %1
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; CHECK-NEXT: B %bb.4
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.3:
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; CHECK-NEXT: successors: %bb.3(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: B %bb.3
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.4:
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; CHECK-NEXT: successors: %bb.5(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[PHI:%[0-9]+]]:fpr32 = PHI %0, %bb.0, %1, %bb.1
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; CHECK-NEXT: $x0 = COPY undef $x0, implicit [[PHI]]
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.5:
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; CHECK-NEXT: successors: %bb.6(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY:%[0-9]+]]:gpr32 = COPY [[PHI]]
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; CHECK-NEXT: CBNZW [[COPY]], %bb.6
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.6:
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; CHECK-NEXT: successors: %bb.7(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[COPY1:%[0-9]+]]:gpr32 = COPY [[PHI]]
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; CHECK-NEXT: CBNZW [[COPY1]], %bb.7
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.7:
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bb.0:
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$x0 = COPY undef $x0, implicit-def %0:gpr32
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B %bb.2
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bb.1:
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$x0 = COPY undef $x0, implicit-def %1:gpr32
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bb.2:
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%2:gpr32 = PHI %1, %bb.1, %0, %bb.0
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B %bb.4
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bb.3:
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B %bb.3
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bb.4:
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%3:fpr32 = PHI %2, %bb.2
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$x0 = COPY undef $x0, implicit %3:fpr32
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bb.5:
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CBNZW %2, %bb.6
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bb.6:
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CBNZW %2, %bb.7
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bb.7:
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...
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# In test4 we do not need to insert a COPY.
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# The register class can be constrained instead.
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---
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name: test4
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: test4
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.4(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $x0 = COPY undef $x0, implicit-def %0
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; CHECK-NEXT: B %bb.4
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: successors: %bb.4(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $x0 = COPY undef $x0, implicit-def %1
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; CHECK-NEXT: B %bb.4
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.3:
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; CHECK-NEXT: successors: %bb.3(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: B %bb.3
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.4:
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; CHECK-NEXT: successors: %bb.5(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32common = PHI %0, %bb.0, %1, %bb.1
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; CHECK-NEXT: CBNZW [[PHI]], %bb.5
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.5:
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bb.0:
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$x0 = COPY undef $x0, implicit-def %0:gpr32
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B %bb.2
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bb.1:
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$x0 = COPY undef $x0, implicit-def %1:gpr32
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bb.2:
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%2:gpr32 = PHI %1, %bb.1, %0, %bb.0
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B %bb.4
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bb.3:
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B %bb.3
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bb.4:
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%3:gpr32sp = PHI %2, %bb.2
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CBNZW %2, %bb.5
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bb.5:
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...
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# In test5 we do not need to insert a COPY.
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# The register class can be constrained instead.
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---
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name: test5
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tracksRegLiveness: true
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body: |
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; CHECK-LABEL: name: test5
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; CHECK: bb.0:
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; CHECK-NEXT: successors: %bb.4(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $x0 = COPY undef $x0, implicit-def %0
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; CHECK-NEXT: B %bb.4
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.1:
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; CHECK-NEXT: successors: %bb.4(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: $x0 = COPY undef $x0, implicit-def %1
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; CHECK-NEXT: B %bb.4
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.3:
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; CHECK-NEXT: successors: %bb.3(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: B %bb.3
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.4:
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; CHECK-NEXT: successors: %bb.5(0x80000000)
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: [[PHI:%[0-9]+]]:gpr32common = PHI %0, %bb.0, %1, %bb.1
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; CHECK-NEXT: CBNZW [[PHI]], %bb.5
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: bb.5:
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bb.0:
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$x0 = COPY undef $x0, implicit-def %0:gpr32common
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B %bb.2
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bb.1:
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$x0 = COPY undef $x0, implicit-def %1:gpr32common
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bb.2:
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%2:gpr32common = PHI %1, %bb.1, %0, %bb.0
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B %bb.4
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bb.3:
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B %bb.3
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bb.4:
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%3:gpr32 = PHI %2, %bb.2
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CBNZW %2, %bb.5
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bb.5:
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...
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