derek.holloway
7502bf64a4
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100 lines
3.5 KiB
LLVM
100 lines
3.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=aarch64-none-linux-gnu < %s | FileCheck %s
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; This test verifies that udiv by constant works correctly even when type
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; legalization promotes constant operands (e.g., i16 -> i32 in BUILD_VECTOR).
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; This is a regression test for a bug where v16i16 would be split into two
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; v8i16 operations during legalization, the i16 constants would be promoted
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; to i32, and then the second DAGCombine round would fail to recognize the
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; promoted constants when trying to convert udiv into mul+shift.
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define <8 x i16> @udiv_v8i16_by_255(<8 x i16> %x) {
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; CHECK-LABEL: udiv_v8i16_by_255:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #32897 // =0x8081
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; CHECK-NEXT: dup v1.8h, w8
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; CHECK-NEXT: umull2 v2.4s, v0.8h, v1.8h
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; CHECK-NEXT: umull v0.4s, v0.4h, v1.4h
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; CHECK-NEXT: uzp2 v0.8h, v0.8h, v2.8h
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; CHECK-NEXT: ushr v0.8h, v0.8h, #7
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; CHECK-NEXT: ret
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%div = udiv <8 x i16> %x, splat (i16 255)
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ret <8 x i16> %div
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}
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define <16 x i16> @udiv_v16i16_by_255(<16 x i16> %x) {
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; CHECK-LABEL: udiv_v16i16_by_255:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #32897 // =0x8081
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; CHECK-NEXT: dup v2.8h, w8
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; CHECK-NEXT: umull2 v3.4s, v0.8h, v2.8h
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; CHECK-NEXT: umull v0.4s, v0.4h, v2.4h
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; CHECK-NEXT: umull2 v4.4s, v1.8h, v2.8h
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; CHECK-NEXT: umull v1.4s, v1.4h, v2.4h
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; CHECK-NEXT: uzp2 v0.8h, v0.8h, v3.8h
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; CHECK-NEXT: uzp2 v1.8h, v1.8h, v4.8h
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; CHECK-NEXT: ushr v0.8h, v0.8h, #7
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; CHECK-NEXT: ushr v1.8h, v1.8h, #7
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; CHECK-NEXT: ret
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%div = udiv <16 x i16> %x, splat (i16 255)
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ret <16 x i16> %div
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}
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define <8 x i16> @urem_v8i16_by_255(<8 x i16> %x) {
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; CHECK-LABEL: urem_v8i16_by_255:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #32897 // =0x8081
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; CHECK-NEXT: dup v1.8h, w8
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; CHECK-NEXT: umull2 v2.4s, v0.8h, v1.8h
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; CHECK-NEXT: umull v1.4s, v0.4h, v1.4h
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; CHECK-NEXT: uzp2 v1.8h, v1.8h, v2.8h
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; CHECK-NEXT: movi v2.2d, #0xff00ff00ff00ff
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; CHECK-NEXT: ushr v1.8h, v1.8h, #7
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; CHECK-NEXT: mls v0.8h, v1.8h, v2.8h
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; CHECK-NEXT: ret
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%rem = urem <8 x i16> %x, splat (i16 255)
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ret <8 x i16> %rem
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}
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define <16 x i16> @urem_v16i16_by_255(<16 x i16> %x) {
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; CHECK-LABEL: urem_v16i16_by_255:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #32897 // =0x8081
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; CHECK-NEXT: dup v2.8h, w8
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; CHECK-NEXT: umull2 v3.4s, v0.8h, v2.8h
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; CHECK-NEXT: umull v4.4s, v0.4h, v2.4h
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; CHECK-NEXT: umull2 v5.4s, v1.8h, v2.8h
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; CHECK-NEXT: umull v2.4s, v1.4h, v2.4h
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; CHECK-NEXT: uzp2 v3.8h, v4.8h, v3.8h
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; CHECK-NEXT: movi v4.2d, #0xff00ff00ff00ff
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; CHECK-NEXT: uzp2 v2.8h, v2.8h, v5.8h
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; CHECK-NEXT: ushr v3.8h, v3.8h, #7
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; CHECK-NEXT: ushr v2.8h, v2.8h, #7
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; CHECK-NEXT: mls v0.8h, v3.8h, v4.8h
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; CHECK-NEXT: mls v1.8h, v2.8h, v4.8h
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; CHECK-NEXT: ret
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%rem = urem <16 x i16> %x, splat (i16 255)
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ret <16 x i16> %rem
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}
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define <8 x i16> @udiv_exact_v8i16_by_255(<8 x i16> %x) {
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; CHECK-LABEL: udiv_exact_v8i16_by_255:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mvni v1.8h, #1, lsl #8
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; CHECK-NEXT: mul v0.8h, v0.8h, v1.8h
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; CHECK-NEXT: ret
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%div = udiv exact <8 x i16> %x, splat (i16 255)
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ret <8 x i16> %div
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}
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define <16 x i16> @udiv_exact_v16i16_by_255(<16 x i16> %x) {
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; CHECK-LABEL: udiv_exact_v16i16_by_255:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mvni v2.8h, #1, lsl #8
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; CHECK-NEXT: mul v0.8h, v0.8h, v2.8h
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; CHECK-NEXT: mul v1.8h, v1.8h, v2.8h
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; CHECK-NEXT: ret
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%div = udiv exact <16 x i16> %x, splat (i16 255)
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ret <16 x i16> %div
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}
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