derek.holloway
7502bf64a4
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94 lines
4.5 KiB
LLVM
94 lines
4.5 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx900 --denormal-fp-math=preserve-sign < %s | FileCheck -check-prefix=GFX9-DENORM %s
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; RUN: llc -global-isel -new-reg-bank-select -mtriple=amdgcn -mcpu=gfx1010 --denormal-fp-math=preserve-sign < %s | FileCheck -check-prefix=GFX10-DENORM %s
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; fold (fsub (fpext (fmul x, y)), z) -> (fma (fpext x), (fpext y), (fneg z))
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define amdgpu_vs float @test_f16_to_f32_sub_ext_mul(half %x, half %y, float %z) {
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; GFX9-DENORM-LABEL: test_f16_to_f32_sub_ext_mul:
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; GFX9-DENORM: ; %bb.0: ; %entry
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; GFX9-DENORM-NEXT: v_mad_mix_f32 v0, v0, v1, -v2 op_sel_hi:[1,1,0]
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; GFX9-DENORM-NEXT: ; return to shader part epilog
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;
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; GFX10-DENORM-LABEL: test_f16_to_f32_sub_ext_mul:
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; GFX10-DENORM: ; %bb.0: ; %entry
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; GFX10-DENORM-NEXT: v_fma_mix_f32 v0, v0, v1, -v2 op_sel_hi:[1,1,0]
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; GFX10-DENORM-NEXT: ; return to shader part epilog
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entry:
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%a = fmul fast half %x, %y
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%b = fpext half %a to float
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%c = fsub fast float %b, %z
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ret float %c
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}
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; fold (fsub x, (fpext (fmul y, z))) -> (fma (fneg (fpext y)), (fpext z), x)
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define amdgpu_vs float @test_f16_to_f32_sub_ext_mul_rhs(float %x, half %y, half %z) {
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; GFX9-DENORM-LABEL: test_f16_to_f32_sub_ext_mul_rhs:
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; GFX9-DENORM: ; %bb.0: ; %.entry
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; GFX9-DENORM-NEXT: v_mad_mix_f32 v0, -v1, v2, v0 op_sel_hi:[1,1,0]
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; GFX9-DENORM-NEXT: ; return to shader part epilog
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;
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; GFX10-DENORM-LABEL: test_f16_to_f32_sub_ext_mul_rhs:
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; GFX10-DENORM: ; %bb.0: ; %.entry
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; GFX10-DENORM-NEXT: v_fma_mix_f32 v0, -v1, v2, v0 op_sel_hi:[1,1,0]
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; GFX10-DENORM-NEXT: ; return to shader part epilog
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.entry:
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%a = fmul fast half %y, %z
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%b = fpext half %a to float
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%c = fsub fast float %x, %b
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ret float %c
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}
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; fold (fsub (fpext (fmul x, y)), z) -> (fma (fpext x), (fpext y), (fneg z))
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define amdgpu_vs <4 x float> @test_v4f16_to_v4f32_sub_ext_mul(<4 x half> %x, <4 x half> %y, <4 x float> %z) {
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; GFX9-DENORM-LABEL: test_v4f16_to_v4f32_sub_ext_mul:
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; GFX9-DENORM: ; %bb.0: ; %entry
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; GFX9-DENORM-NEXT: v_pk_mul_f16 v2, v0, v2
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; GFX9-DENORM-NEXT: v_pk_mul_f16 v3, v1, v3
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; GFX9-DENORM-NEXT: v_mad_mix_f32 v0, v4, -1.0, v2 op_sel_hi:[0,1,1]
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; GFX9-DENORM-NEXT: v_mad_mix_f32 v1, v5, -1.0, v2 op_sel:[0,0,1] op_sel_hi:[0,1,1]
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; GFX9-DENORM-NEXT: v_mad_mix_f32 v2, v6, -1.0, v3 op_sel_hi:[0,1,1]
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; GFX9-DENORM-NEXT: v_mad_mix_f32 v3, v7, -1.0, v3 op_sel:[0,0,1] op_sel_hi:[0,1,1]
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; GFX9-DENORM-NEXT: ; return to shader part epilog
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;
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; GFX10-DENORM-LABEL: test_v4f16_to_v4f32_sub_ext_mul:
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; GFX10-DENORM: ; %bb.0: ; %entry
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; GFX10-DENORM-NEXT: v_fma_mix_f32 v4, v0, v2, -v4 op_sel_hi:[1,1,0]
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; GFX10-DENORM-NEXT: v_fma_mix_f32 v5, v0, v2, -v5 op_sel:[1,1,0] op_sel_hi:[1,1,0]
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; GFX10-DENORM-NEXT: v_fma_mix_f32 v2, v1, v3, -v6 op_sel_hi:[1,1,0]
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; GFX10-DENORM-NEXT: v_fma_mix_f32 v3, v1, v3, -v7 op_sel:[1,1,0] op_sel_hi:[1,1,0]
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; GFX10-DENORM-NEXT: v_mov_b32_e32 v0, v4
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; GFX10-DENORM-NEXT: v_mov_b32_e32 v1, v5
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; GFX10-DENORM-NEXT: ; return to shader part epilog
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entry:
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%a = fmul fast <4 x half> %x, %y
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%b = fpext <4 x half> %a to <4 x float>
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%c = fsub fast <4 x float> %b, %z
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ret <4 x float> %c
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}
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; fold (fsub x, (fpext (fmul y, z))) -> (fma (fneg (fpext y)), (fpext z), x)
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define amdgpu_vs <4 x float> @test_v4f16_to_v4f32_sub_ext_mul_rhs(<4 x float> %x, <4 x half> %y, <4 x half> %z) {
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; GFX9-DENORM-LABEL: test_v4f16_to_v4f32_sub_ext_mul_rhs:
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; GFX9-DENORM: ; %bb.0: ; %.entry
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; GFX9-DENORM-NEXT: v_pk_mul_f16 v4, v4, v6
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; GFX9-DENORM-NEXT: v_pk_mul_f16 v5, v5, v7
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; GFX9-DENORM-NEXT: v_mad_mix_f32 v0, v4, -1.0, v0 op_sel_hi:[1,1,0]
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; GFX9-DENORM-NEXT: v_mad_mix_f32 v1, v4, -1.0, v1 op_sel:[1,0,0] op_sel_hi:[1,1,0]
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; GFX9-DENORM-NEXT: v_mad_mix_f32 v2, v5, -1.0, v2 op_sel_hi:[1,1,0]
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; GFX9-DENORM-NEXT: v_mad_mix_f32 v3, v5, -1.0, v3 op_sel:[1,0,0] op_sel_hi:[1,1,0]
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; GFX9-DENORM-NEXT: ; return to shader part epilog
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;
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; GFX10-DENORM-LABEL: test_v4f16_to_v4f32_sub_ext_mul_rhs:
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; GFX10-DENORM: ; %bb.0: ; %.entry
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; GFX10-DENORM-NEXT: v_fma_mix_f32 v0, -v4, v6, v0 op_sel_hi:[1,1,0]
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; GFX10-DENORM-NEXT: v_fma_mix_f32 v1, -v4, v6, v1 op_sel:[1,1,0] op_sel_hi:[1,1,0]
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; GFX10-DENORM-NEXT: v_fma_mix_f32 v2, -v5, v7, v2 op_sel_hi:[1,1,0]
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; GFX10-DENORM-NEXT: v_fma_mix_f32 v3, -v5, v7, v3 op_sel:[1,1,0] op_sel_hi:[1,1,0]
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; GFX10-DENORM-NEXT: ; return to shader part epilog
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.entry:
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%a = fmul fast <4 x half> %y, %z
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%b = fpext <4 x half> %a to <4 x float>
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%c = fsub fast <4 x float> %x, %b
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ret <4 x float> %c
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}
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