derek.holloway
7502bf64a4
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234 lines
6.9 KiB
YAML
234 lines
6.9 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn -run-pass=amdgpu-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s
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---
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name: rotl_i32
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1, $vgpr2
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; CHECK-LABEL: name: rotl_i32
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; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %a:_(s32) = COPY $vgpr0
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; CHECK-NEXT: %amt:_(s32) = COPY $vgpr1
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; CHECK-NEXT: %or:_(s32) = G_ROTL %a, %amt(s32)
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; CHECK-NEXT: $vgpr2 = COPY %or(s32)
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%a:_(s32) = COPY $vgpr0
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%amt:_(s32) = COPY $vgpr1
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%bw:_(s32) = G_CONSTANT i32 32
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%shl:_(s32) = G_SHL %a, %amt
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%sub:_(s32) = G_SUB %bw, %amt
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%lshr:_(s32) = G_LSHR %a, %sub
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%or:_(s32) = G_OR %shl, %lshr
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$vgpr2 = COPY %or
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...
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---
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name: rotl_v2i32
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5
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; CHECK-LABEL: name: rotl_v2i32
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; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3, $vgpr4_vgpr5
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %a:_(<2 x s32>) = COPY $vgpr0_vgpr1
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; CHECK-NEXT: %amt:_(<2 x s32>) = COPY $vgpr2_vgpr3
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; CHECK-NEXT: %or:_(<2 x s32>) = G_ROTL %a, %amt(<2 x s32>)
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; CHECK-NEXT: $vgpr4_vgpr5 = COPY %or(<2 x s32>)
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%a:_(<2 x s32>) = COPY $vgpr0_vgpr1
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%amt:_(<2 x s32>) = COPY $vgpr2_vgpr3
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%scalar_bw:_(s32) = G_CONSTANT i32 32
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%bw:_(<2 x s32>) = G_BUILD_VECTOR %scalar_bw, %scalar_bw
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%shl:_(<2 x s32>) = G_SHL %a, %amt
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%sub:_(<2 x s32>) = G_SUB %bw, %amt
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%lshr:_(<2 x s32>) = G_LSHR %a, %sub
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%or:_(<2 x s32>) = G_OR %shl, %lshr
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$vgpr4_vgpr5 = COPY %or
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...
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---
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name: rotl_commute_i32
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1, $vgpr2
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; CHECK-LABEL: name: rotl_commute_i32
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; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %a:_(s32) = COPY $vgpr0
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; CHECK-NEXT: %amt:_(s32) = COPY $vgpr1
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; CHECK-NEXT: %or:_(s32) = G_ROTL %a, %amt(s32)
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; CHECK-NEXT: $vgpr2 = COPY %or(s32)
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%a:_(s32) = COPY $vgpr0
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%amt:_(s32) = COPY $vgpr1
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%bw:_(s32) = G_CONSTANT i32 32
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%shl:_(s32) = G_SHL %a, %amt
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%sub:_(s32) = G_SUB %bw, %amt
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%lshr:_(s32) = G_LSHR %a, %sub
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%or:_(s32) = G_OR %lshr, %shl
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$vgpr2 = COPY %or
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...
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---
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name: rotr_i32
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1, $vgpr2
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; CHECK-LABEL: name: rotr_i32
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; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %a:_(s32) = COPY $vgpr0
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; CHECK-NEXT: %amt:_(s32) = COPY $vgpr1
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; CHECK-NEXT: %or:_(s32) = G_ROTR %a, %amt(s32)
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; CHECK-NEXT: $vgpr2 = COPY %or(s32)
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%a:_(s32) = COPY $vgpr0
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%amt:_(s32) = COPY $vgpr1
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%bw:_(s32) = G_CONSTANT i32 32
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%lshr:_(s32) = G_LSHR %a, %amt
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%sub:_(s32) = G_SUB %bw, %amt
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%shl:_(s32) = G_SHL %a, %sub
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%or:_(s32) = G_OR %shl, %lshr
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$vgpr2 = COPY %or
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...
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---
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name: rot_i32_const
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; CHECK-LABEL: name: rot_i32_const
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; CHECK: liveins: $vgpr0, $vgpr1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %a:_(s32) = COPY $vgpr0
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; CHECK-NEXT: %amt1:_(s32) = G_CONSTANT i32 12
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; CHECK-NEXT: %or:_(s32) = G_ROTR %a, %amt1(s32)
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; CHECK-NEXT: $vgpr1 = COPY %or(s32)
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%a:_(s32) = COPY $vgpr0
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%amt0:_(s32) = G_CONSTANT i32 20
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%amt1:_(s32) = G_CONSTANT i32 12
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%shl:_(s32) = G_SHL %a, %amt0
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%lshr:_(s32) = G_LSHR %a, %amt1
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%or:_(s32) = G_OR %shl, %lshr
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$vgpr1 = COPY %or
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...
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---
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name: rot_v2i32_const
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
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; CHECK-LABEL: name: rot_v2i32_const
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; CHECK: liveins: $vgpr0_vgpr1, $vgpr2_vgpr3
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %a:_(<2 x s32>) = COPY $vgpr0_vgpr1
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; CHECK-NEXT: %scalar_amt1:_(s32) = G_CONSTANT i32 12
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; CHECK-NEXT: %amt1:_(<2 x s32>) = G_BUILD_VECTOR %scalar_amt1(s32), %scalar_amt1(s32)
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; CHECK-NEXT: %or:_(<2 x s32>) = G_ROTR %a, %amt1(<2 x s32>)
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; CHECK-NEXT: $vgpr2_vgpr3 = COPY %or(<2 x s32>)
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%a:_(<2 x s32>) = COPY $vgpr0_vgpr1
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%scalar_amt0:_(s32) = G_CONSTANT i32 20
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%amt0:_(<2 x s32>) = G_BUILD_VECTOR %scalar_amt0, %scalar_amt0
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%scalar_amt1:_(s32) = G_CONSTANT i32 12
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%amt1:_(<2 x s32>) = G_BUILD_VECTOR %scalar_amt1, %scalar_amt1
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%shl:_(<2 x s32>) = G_SHL %a, %amt0
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%lshr:_(<2 x s32>) = G_LSHR %a, %amt1
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%or:_(<2 x s32>) = G_OR %shl, %lshr
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$vgpr2_vgpr3 = COPY %or
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...
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---
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name: rot_i32_bad_const
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; CHECK-LABEL: name: rot_i32_bad_const
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; CHECK: liveins: $vgpr0, $vgpr1
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %a:_(s32) = COPY $vgpr0
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; CHECK-NEXT: %amt0:_(s32) = G_CONSTANT i32 20
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; CHECK-NEXT: %amt1:_(s32) = G_CONSTANT i32 11
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; CHECK-NEXT: %shl:_(s32) = G_SHL %a, %amt0(s32)
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; CHECK-NEXT: %lshr:_(s32) = G_LSHR %a, %amt1(s32)
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; CHECK-NEXT: %or:_(s32) = G_OR %shl, %lshr
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; CHECK-NEXT: $vgpr1 = COPY %or(s32)
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%a:_(s32) = COPY $vgpr0
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%amt0:_(s32) = G_CONSTANT i32 20
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%amt1:_(s32) = G_CONSTANT i32 11
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%shl:_(s32) = G_SHL %a, %amt0
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%lshr:_(s32) = G_LSHR %a, %amt1
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%or:_(s32) = G_OR %shl, %lshr
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$vgpr1 = COPY %or
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...
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---
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name: rotl_i32_bad_bw
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1, $vgpr2
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; CHECK-LABEL: name: rotl_i32_bad_bw
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; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %a:_(s32) = COPY $vgpr0
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; CHECK-NEXT: %amt:_(s32) = COPY $vgpr1
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; CHECK-NEXT: %bw:_(s32) = G_CONSTANT i32 31
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; CHECK-NEXT: %shl:_(s32) = G_SHL %a, %amt(s32)
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; CHECK-NEXT: %sub:_(s32) = G_SUB %bw, %amt
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; CHECK-NEXT: %lshr:_(s32) = G_LSHR %a, %sub(s32)
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; CHECK-NEXT: %or:_(s32) = G_OR %shl, %lshr
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; CHECK-NEXT: $vgpr2 = COPY %or(s32)
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%a:_(s32) = COPY $vgpr0
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%amt:_(s32) = COPY $vgpr1
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%bw:_(s32) = G_CONSTANT i32 31
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%shl:_(s32) = G_SHL %a, %amt
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%sub:_(s32) = G_SUB %bw, %amt
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%lshr:_(s32) = G_LSHR %a, %sub
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%or:_(s32) = G_OR %shl, %lshr
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$vgpr2 = COPY %or
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...
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---
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name: rotl_i32_bad_amt_reg
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
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; CHECK-LABEL: name: rotl_i32_bad_amt_reg
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; CHECK: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
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; CHECK-NEXT: {{ $}}
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; CHECK-NEXT: %a:_(s32) = COPY $vgpr0
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; CHECK-NEXT: %amt:_(s32) = COPY $vgpr1
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; CHECK-NEXT: %amt1:_(s32) = COPY $vgpr2
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; CHECK-NEXT: %bw:_(s32) = G_CONSTANT i32 32
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; CHECK-NEXT: %shl:_(s32) = G_SHL %a, %amt(s32)
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; CHECK-NEXT: %sub:_(s32) = G_SUB %bw, %amt1
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; CHECK-NEXT: %lshr:_(s32) = G_LSHR %a, %sub(s32)
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; CHECK-NEXT: %or:_(s32) = G_OR %shl, %lshr
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; CHECK-NEXT: $vgpr3 = COPY %or(s32)
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%a:_(s32) = COPY $vgpr0
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%amt:_(s32) = COPY $vgpr1
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%amt1:_(s32) = COPY $vgpr2
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%bw:_(s32) = G_CONSTANT i32 32
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%shl:_(s32) = G_SHL %a, %amt
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%sub:_(s32) = G_SUB %bw, %amt1
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%lshr:_(s32) = G_LSHR %a, %sub
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%or:_(s32) = G_OR %shl, %lshr
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$vgpr3 = COPY %or
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...
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