derek.holloway
7502bf64a4
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46 lines
1.8 KiB
LLVM
46 lines
1.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc -global-isel -new-reg-bank-select -mattr=+enable-flat-scratch -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 < %s | FileCheck -check-prefix=MESA %s
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; RUN: llc -global-isel -new-reg-bank-select -mattr=+enable-flat-scratch -mtriple=amdgcn-amd-amdpal -mcpu=gfx900 < %s | FileCheck -check-prefix=PAL %s
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; Test that the initialization for flat_scratch doesn't crash. PAL
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; doesn't add a user SGPR for initializing flat_scratch, mesa does
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; (although this probably isn't actually defined).
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define amdgpu_ps void @amdgpu_ps() {
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; MESA-LABEL: amdgpu_ps:
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; MESA: ; %bb.0:
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; MESA-NEXT: s_mov_b64 s[0:1], src_private_base
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; MESA-NEXT: s_mov_b32 s0, 0
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; MESA-NEXT: s_add_u32 flat_scratch_lo, s2, s4
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; MESA-NEXT: v_mov_b32_e32 v0, s0
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; MESA-NEXT: s_addc_u32 flat_scratch_hi, s3, 0
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; MESA-NEXT: v_mov_b32_e32 v2, 0
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; MESA-NEXT: v_mov_b32_e32 v1, s1
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; MESA-NEXT: flat_store_dword v[0:1], v2
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; MESA-NEXT: s_waitcnt vmcnt(0)
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; MESA-NEXT: s_endpgm
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;
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; PAL-LABEL: amdgpu_ps:
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; PAL: ; %bb.0:
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; PAL-NEXT: s_getpc_b64 s[2:3]
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; PAL-NEXT: s_mov_b32 s2, s0
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; PAL-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0
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; PAL-NEXT: v_mov_b32_e32 v2, 0
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; PAL-NEXT: s_waitcnt lgkmcnt(0)
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; PAL-NEXT: s_and_b32 s3, s3, 0xffff
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; PAL-NEXT: s_add_u32 flat_scratch_lo, s2, s0
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; PAL-NEXT: s_mov_b64 s[0:1], src_private_base
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; PAL-NEXT: s_mov_b32 s0, 0
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; PAL-NEXT: v_mov_b32_e32 v0, s0
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; PAL-NEXT: s_addc_u32 flat_scratch_hi, s3, 0
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; PAL-NEXT: v_mov_b32_e32 v1, s1
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; PAL-NEXT: flat_store_dword v[0:1], v2
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; PAL-NEXT: s_waitcnt vmcnt(0)
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; PAL-NEXT: s_endpgm
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%alloca = alloca i32, addrspace(5)
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%cast = addrspacecast ptr addrspace(5) %alloca to ptr
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store volatile i32 0, ptr %cast
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ret void
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}
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