derek.holloway
7502bf64a4
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701 lines
21 KiB
LLVM
701 lines
21 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --filter-out "s_wait" --filter-out "s_delay_alu" --filter-out "endpgm" --filter-out "store" --version 6
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; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1010 -new-reg-bank-select < %s | FileCheck %s --check-prefixes=GCN,FAKE16,PREGFX12,PREGFX12-FAKE16
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; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -new-reg-bank-select < %s | FileCheck %s --check-prefixes=GCN,PREGFX12,TRUE16
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; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -new-reg-bank-select < %s | FileCheck %s --check-prefixes=GCN,FAKE16,PREGFX12,PREGFX12-FAKE16
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; RUN: llc -global-isel -mtriple=amdgcn -mcpu=gfx1200 -new-reg-bank-select < %s | FileCheck %s --check-prefixes=GCN,FAKE16,GFX12
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define amdgpu_ps void @s_fptoui_f16_to_i16(half inreg %x, ptr addrspace(1) %out) {
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; PREGFX12-FAKE16-LABEL: s_fptoui_f16_to_i16:
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; PREGFX12-FAKE16: ; %bb.0:
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; PREGFX12-FAKE16: v_cvt_u16_f16_e32 v2, s0
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;
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; TRUE16-LABEL: s_fptoui_f16_to_i16:
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; TRUE16: ; %bb.0:
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; TRUE16: v_cvt_u16_f16_e32 v2.l, s0
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;
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; GFX12-LABEL: s_fptoui_f16_to_i16:
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; GFX12: ; %bb.0:
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; GFX12: v_cvt_u16_f16_e32 v2.l, s0
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%result = fptoui half %x to i16
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store i16 %result, ptr addrspace(1) %out
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ret void
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}
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define amdgpu_ps void @s_fptosi_f16_to_i16(half inreg %x, ptr addrspace(1) %out) {
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; PREGFX12-FAKE16-LABEL: s_fptosi_f16_to_i16:
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; PREGFX12-FAKE16: ; %bb.0:
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; PREGFX12-FAKE16: v_cvt_i16_f16_e32 v2, s0
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;
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; TRUE16-LABEL: s_fptosi_f16_to_i16:
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; TRUE16: ; %bb.0:
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; TRUE16: v_cvt_i16_f16_e32 v2.l, s0
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;
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; GFX12-LABEL: s_fptosi_f16_to_i16:
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; GFX12: ; %bb.0:
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; GFX12: v_cvt_i16_f16_e32 v2.l, s0
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%result = fptosi half %x to i16
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store i16 %result, ptr addrspace(1) %out
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ret void
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}
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define amdgpu_ps void @v_fptoui_f16_to_i16(half %x, ptr addrspace(1) %out) {
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; PREGFX12-FAKE16-LABEL: v_fptoui_f16_to_i16:
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; PREGFX12-FAKE16: ; %bb.0:
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; PREGFX12-FAKE16: v_cvt_u16_f16_e32 v0, v0
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;
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; TRUE16-LABEL: v_fptoui_f16_to_i16:
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; TRUE16: ; %bb.0:
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; TRUE16: v_cvt_u16_f16_e32 v0.l, v0.l
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;
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; GFX12-LABEL: v_fptoui_f16_to_i16:
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; GFX12: ; %bb.0:
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; GFX12: v_cvt_u16_f16_e32 v0.l, v0.l
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%result = fptoui half %x to i16
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store i16 %result, ptr addrspace(1) %out
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ret void
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}
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define amdgpu_ps void @v_fptosi_f16_to_i16(half %x, ptr addrspace(1) %out) {
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; PREGFX12-FAKE16-LABEL: v_fptosi_f16_to_i16:
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; PREGFX12-FAKE16: ; %bb.0:
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; PREGFX12-FAKE16: v_cvt_i16_f16_e32 v0, v0
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;
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; TRUE16-LABEL: v_fptosi_f16_to_i16:
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; TRUE16: ; %bb.0:
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; TRUE16: v_cvt_i16_f16_e32 v0.l, v0.l
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;
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; GFX12-LABEL: v_fptosi_f16_to_i16:
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; GFX12: ; %bb.0:
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; GFX12: v_cvt_i16_f16_e32 v0.l, v0.l
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%result = fptosi half %x to i16
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store i16 %result, ptr addrspace(1) %out
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ret void
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}
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define amdgpu_ps void @s_fptoui_f16_to_i32(half inreg %x, ptr addrspace(1) %out) {
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; PREGFX12-LABEL: s_fptoui_f16_to_i32:
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; PREGFX12: ; %bb.0:
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; PREGFX12: v_cvt_f32_f16_e32 v2, s0
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; PREGFX12: v_cvt_u32_f32_e32 v2, v2
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;
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; GFX12-LABEL: s_fptoui_f16_to_i32:
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; GFX12: ; %bb.0:
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; GFX12: s_cvt_f32_f16 s0, s0
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; GFX12: s_cvt_u32_f32 s0, s0
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; GFX12: v_mov_b32_e32 v2, s0
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%result = fptoui half %x to i32
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store i32 %result, ptr addrspace(1) %out
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ret void
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}
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define amdgpu_ps void @s_fptosi_f16_to_i32(half inreg %x, ptr addrspace(1) %out) {
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; PREGFX12-LABEL: s_fptosi_f16_to_i32:
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; PREGFX12: ; %bb.0:
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; PREGFX12: v_cvt_f32_f16_e32 v2, s0
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; PREGFX12: v_cvt_i32_f32_e32 v2, v2
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;
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; GFX12-LABEL: s_fptosi_f16_to_i32:
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; GFX12: ; %bb.0:
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; GFX12: s_cvt_f32_f16 s0, s0
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; GFX12: s_cvt_i32_f32 s0, s0
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; GFX12: v_mov_b32_e32 v2, s0
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%result = fptosi half %x to i32
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store i32 %result, ptr addrspace(1) %out
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ret void
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}
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define amdgpu_ps void @v_fptoui_f16_to_i32(half %x, ptr addrspace(1) %out) {
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; PREGFX12-FAKE16-LABEL: v_fptoui_f16_to_i32:
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; PREGFX12-FAKE16: ; %bb.0:
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; PREGFX12-FAKE16: v_cvt_f32_f16_e32 v0, v0
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; PREGFX12-FAKE16: v_cvt_u32_f32_e32 v0, v0
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;
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; TRUE16-LABEL: v_fptoui_f16_to_i32:
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; TRUE16: ; %bb.0:
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; TRUE16: v_cvt_f32_f16_e32 v0, v0.l
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; TRUE16: v_cvt_u32_f32_e32 v0, v0
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;
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; GFX12-LABEL: v_fptoui_f16_to_i32:
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; GFX12: ; %bb.0:
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; GFX12: v_cvt_f32_f16_e32 v0, v0.l
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; GFX12: v_cvt_u32_f32_e32 v0, v0
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%result = fptoui half %x to i32
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store i32 %result, ptr addrspace(1) %out
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ret void
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}
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define amdgpu_ps void @v_fptosi_f16_to_i32(half %x, ptr addrspace(1) %out) {
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; PREGFX12-FAKE16-LABEL: v_fptosi_f16_to_i32:
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; PREGFX12-FAKE16: ; %bb.0:
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; PREGFX12-FAKE16: v_cvt_f32_f16_e32 v0, v0
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; PREGFX12-FAKE16: v_cvt_i32_f32_e32 v0, v0
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;
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; TRUE16-LABEL: v_fptosi_f16_to_i32:
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; TRUE16: ; %bb.0:
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; TRUE16: v_cvt_f32_f16_e32 v0, v0.l
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; TRUE16: v_cvt_i32_f32_e32 v0, v0
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;
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; GFX12-LABEL: v_fptosi_f16_to_i32:
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; GFX12: ; %bb.0:
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; GFX12: v_cvt_f32_f16_e32 v0, v0.l
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; GFX12: v_cvt_i32_f32_e32 v0, v0
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%result = fptosi half %x to i32
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store i32 %result, ptr addrspace(1) %out
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ret void
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}
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define amdgpu_ps void @s_fptoui_f32_to_i32(float inreg %x, ptr addrspace(1) %out) {
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; PREGFX12-LABEL: s_fptoui_f32_to_i32:
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; PREGFX12: ; %bb.0:
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; PREGFX12: v_cvt_u32_f32_e32 v2, s0
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;
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; GFX12-LABEL: s_fptoui_f32_to_i32:
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; GFX12: ; %bb.0:
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; GFX12: s_cvt_u32_f32 s0, s0
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; GFX12: v_mov_b32_e32 v2, s0
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%result = fptoui float %x to i32
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store i32 %result, ptr addrspace(1) %out
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ret void
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}
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define amdgpu_ps void @s_fptosi_f32_to_i32(float inreg %x, ptr addrspace(1) %out) {
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; PREGFX12-LABEL: s_fptosi_f32_to_i32:
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; PREGFX12: ; %bb.0:
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; PREGFX12: v_cvt_i32_f32_e32 v2, s0
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;
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; GFX12-LABEL: s_fptosi_f32_to_i32:
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; GFX12: ; %bb.0:
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; GFX12: s_cvt_i32_f32 s0, s0
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; GFX12: v_mov_b32_e32 v2, s0
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%result = fptosi float %x to i32
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store i32 %result, ptr addrspace(1) %out
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ret void
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}
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define amdgpu_ps void @v_fptoui_f32_to_i32(float %x, ptr addrspace(1) %out) {
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; GCN-LABEL: v_fptoui_f32_to_i32:
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; GCN: ; %bb.0:
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; GCN: v_cvt_u32_f32_e32 v0, v0
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%result = fptoui float %x to i32
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store i32 %result, ptr addrspace(1) %out
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ret void
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}
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define amdgpu_ps void @v_fptosi_f32_to_i32(float %x, ptr addrspace(1) %out) {
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; GCN-LABEL: v_fptosi_f32_to_i32:
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; GCN: ; %bb.0:
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; GCN: v_cvt_i32_f32_e32 v0, v0
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%result = fptosi float %x to i32
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store i32 %result, ptr addrspace(1) %out
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ret void
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}
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define amdgpu_ps void @s_fptoui_f64_to_i32(double inreg %x, ptr addrspace(1) %out) {
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; GCN-LABEL: s_fptoui_f64_to_i32:
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; GCN: ; %bb.0:
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; GCN: v_cvt_u32_f64_e32 v2, s[0:1]
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%result = fptoui double %x to i32
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store i32 %result, ptr addrspace(1) %out
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ret void
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}
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define amdgpu_ps void @s_fptosi_f64_to_i32(double inreg %x, ptr addrspace(1) %out) {
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; GCN-LABEL: s_fptosi_f64_to_i32:
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; GCN: ; %bb.0:
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; GCN: v_cvt_i32_f64_e32 v2, s[0:1]
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%result = fptosi double %x to i32
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store i32 %result, ptr addrspace(1) %out
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ret void
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}
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define amdgpu_ps void @v_fptoui_f64_to_i32(double %x, ptr addrspace(1) %out) {
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; GCN-LABEL: v_fptoui_f64_to_i32:
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; GCN: ; %bb.0:
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; GCN: v_cvt_u32_f64_e32 v0, v[0:1]
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%result = fptoui double %x to i32
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store i32 %result, ptr addrspace(1) %out
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ret void
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}
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define amdgpu_ps void @v_fptosi_f64_to_i32(double %x, ptr addrspace(1) %out) {
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; GCN-LABEL: v_fptosi_f64_to_i32:
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; GCN: ; %bb.0:
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; GCN: v_cvt_i32_f64_e32 v0, v[0:1]
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%result = fptosi double %x to i32
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store i32 %result, ptr addrspace(1) %out
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ret void
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}
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define amdgpu_ps void @s_fptoui_sat_f16_to_i16(half inreg %x, ptr addrspace(1) %out) {
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; PREGFX12-FAKE16-LABEL: s_fptoui_sat_f16_to_i16:
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; PREGFX12-FAKE16: ; %bb.0:
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; PREGFX12-FAKE16: v_cvt_u16_f16_e32 v2, s0
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;
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; TRUE16-LABEL: s_fptoui_sat_f16_to_i16:
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; TRUE16: ; %bb.0:
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; TRUE16: v_cvt_u16_f16_e32 v2.l, s0
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;
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; GFX12-LABEL: s_fptoui_sat_f16_to_i16:
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; GFX12: ; %bb.0:
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; GFX12: v_cvt_u16_f16_e32 v2.l, s0
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%result = call i16 @llvm.fptoui.sat.i16.f16(half %x)
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store i16 %result, ptr addrspace(1) %out
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ret void
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}
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define amdgpu_ps void @s_fptosi_sat_f16_to_i16(half inreg %x, ptr addrspace(1) %out) {
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; PREGFX12-FAKE16-LABEL: s_fptosi_sat_f16_to_i16:
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; PREGFX12-FAKE16: ; %bb.0:
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; PREGFX12-FAKE16: v_cvt_i16_f16_e32 v2, s0
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;
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; TRUE16-LABEL: s_fptosi_sat_f16_to_i16:
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; TRUE16: ; %bb.0:
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; TRUE16: v_cvt_i16_f16_e32 v2.l, s0
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;
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; GFX12-LABEL: s_fptosi_sat_f16_to_i16:
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; GFX12: ; %bb.0:
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; GFX12: v_cvt_i16_f16_e32 v2.l, s0
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%result = call i16 @llvm.fptosi.sat.i16.f16(half %x)
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store i16 %result, ptr addrspace(1) %out
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ret void
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}
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define amdgpu_ps void @v_fptoui_sat_f16_to_i16(half %x, ptr addrspace(1) %out) {
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; PREGFX12-FAKE16-LABEL: v_fptoui_sat_f16_to_i16:
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; PREGFX12-FAKE16: ; %bb.0:
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; PREGFX12-FAKE16: v_cvt_u16_f16_e32 v0, v0
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;
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; TRUE16-LABEL: v_fptoui_sat_f16_to_i16:
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; TRUE16: ; %bb.0:
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; TRUE16: v_cvt_u16_f16_e32 v0.l, v0.l
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;
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; GFX12-LABEL: v_fptoui_sat_f16_to_i16:
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; GFX12: ; %bb.0:
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; GFX12: v_cvt_u16_f16_e32 v0.l, v0.l
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%result = call i16 @llvm.fptoui.sat.i16.f16(half %x)
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store i16 %result, ptr addrspace(1) %out
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ret void
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}
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define amdgpu_ps void @v_fptosi_sat_f16_to_i16(half %x, ptr addrspace(1) %out) {
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; PREGFX12-FAKE16-LABEL: v_fptosi_sat_f16_to_i16:
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; PREGFX12-FAKE16: ; %bb.0:
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; PREGFX12-FAKE16: v_cvt_i16_f16_e32 v0, v0
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;
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; TRUE16-LABEL: v_fptosi_sat_f16_to_i16:
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; TRUE16: ; %bb.0:
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; TRUE16: v_cvt_i16_f16_e32 v0.l, v0.l
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;
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; GFX12-LABEL: v_fptosi_sat_f16_to_i16:
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; GFX12: ; %bb.0:
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; GFX12: v_cvt_i16_f16_e32 v0.l, v0.l
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%result = call i16 @llvm.fptosi.sat.i16.f16(half %x)
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store i16 %result, ptr addrspace(1) %out
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ret void
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}
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define amdgpu_ps void @s_fptoui_sat_f16_to_i32(half inreg %x, ptr addrspace(1) %out) {
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; PREGFX12-LABEL: s_fptoui_sat_f16_to_i32:
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; PREGFX12: ; %bb.0:
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; PREGFX12: v_cvt_f32_f16_e32 v2, s0
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; PREGFX12: v_cvt_u32_f32_e32 v2, v2
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;
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; GFX12-LABEL: s_fptoui_sat_f16_to_i32:
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; GFX12: ; %bb.0:
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; GFX12: s_cvt_f32_f16 s0, s0
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|
; GFX12: s_cvt_u32_f32 s0, s0
|
|
; GFX12: v_mov_b32_e32 v2, s0
|
|
%result = call i32 @llvm.fptoui.sat.i32.f16(half %x)
|
|
store i32 %result, ptr addrspace(1) %out
|
|
ret void
|
|
}
|
|
|
|
define amdgpu_ps void @s_fptosi_sat_f16_to_i32(half inreg %x, ptr addrspace(1) %out) {
|
|
; PREGFX12-LABEL: s_fptosi_sat_f16_to_i32:
|
|
; PREGFX12: ; %bb.0:
|
|
; PREGFX12: v_cvt_f32_f16_e32 v2, s0
|
|
; PREGFX12: v_cvt_i32_f32_e32 v2, v2
|
|
;
|
|
; GFX12-LABEL: s_fptosi_sat_f16_to_i32:
|
|
; GFX12: ; %bb.0:
|
|
; GFX12: s_cvt_f32_f16 s0, s0
|
|
; GFX12: s_cvt_i32_f32 s0, s0
|
|
; GFX12: v_mov_b32_e32 v2, s0
|
|
%result = call i32 @llvm.fptosi.sat.i32.f16(half %x)
|
|
store i32 %result, ptr addrspace(1) %out
|
|
ret void
|
|
}
|
|
|
|
define amdgpu_ps void @v_fptoui_sat_f16_to_i32(half %x, ptr addrspace(1) %out) {
|
|
; PREGFX12-FAKE16-LABEL: v_fptoui_sat_f16_to_i32:
|
|
; PREGFX12-FAKE16: ; %bb.0:
|
|
; PREGFX12-FAKE16: v_cvt_f32_f16_e32 v0, v0
|
|
; PREGFX12-FAKE16: v_cvt_u32_f32_e32 v0, v0
|
|
;
|
|
; TRUE16-LABEL: v_fptoui_sat_f16_to_i32:
|
|
; TRUE16: ; %bb.0:
|
|
; TRUE16: v_cvt_f32_f16_e32 v0, v0.l
|
|
; TRUE16: v_cvt_u32_f32_e32 v0, v0
|
|
;
|
|
; GFX12-LABEL: v_fptoui_sat_f16_to_i32:
|
|
; GFX12: ; %bb.0:
|
|
; GFX12: v_cvt_f32_f16_e32 v0, v0.l
|
|
; GFX12: v_cvt_u32_f32_e32 v0, v0
|
|
%result = call i32 @llvm.fptoui.sat.i32.f16(half %x)
|
|
store i32 %result, ptr addrspace(1) %out
|
|
ret void
|
|
}
|
|
|
|
define amdgpu_ps void @v_fptosi_sat_f16_to_i32(half %x, ptr addrspace(1) %out) {
|
|
; PREGFX12-FAKE16-LABEL: v_fptosi_sat_f16_to_i32:
|
|
; PREGFX12-FAKE16: ; %bb.0:
|
|
; PREGFX12-FAKE16: v_cvt_f32_f16_e32 v0, v0
|
|
; PREGFX12-FAKE16: v_cvt_i32_f32_e32 v0, v0
|
|
;
|
|
; TRUE16-LABEL: v_fptosi_sat_f16_to_i32:
|
|
; TRUE16: ; %bb.0:
|
|
; TRUE16: v_cvt_f32_f16_e32 v0, v0.l
|
|
; TRUE16: v_cvt_i32_f32_e32 v0, v0
|
|
;
|
|
; GFX12-LABEL: v_fptosi_sat_f16_to_i32:
|
|
; GFX12: ; %bb.0:
|
|
; GFX12: v_cvt_f32_f16_e32 v0, v0.l
|
|
; GFX12: v_cvt_i32_f32_e32 v0, v0
|
|
%result = call i32 @llvm.fptosi.sat.i32.f16(half %x)
|
|
store i32 %result, ptr addrspace(1) %out
|
|
ret void
|
|
}
|
|
|
|
define amdgpu_ps void @s_fptoui_sat_f32_to_i32(float inreg %x, ptr addrspace(1) %out) {
|
|
; PREGFX12-LABEL: s_fptoui_sat_f32_to_i32:
|
|
; PREGFX12: ; %bb.0:
|
|
; PREGFX12: v_cvt_u32_f32_e32 v2, s0
|
|
;
|
|
; GFX12-LABEL: s_fptoui_sat_f32_to_i32:
|
|
; GFX12: ; %bb.0:
|
|
; GFX12: s_cvt_u32_f32 s0, s0
|
|
; GFX12: v_mov_b32_e32 v2, s0
|
|
%result = call i32 @llvm.fptoui.sat.i32.f32(float %x)
|
|
store i32 %result, ptr addrspace(1) %out
|
|
ret void
|
|
}
|
|
|
|
define amdgpu_ps void @s_fptosi_sat_f32_to_i32(float inreg %x, ptr addrspace(1) %out) {
|
|
; PREGFX12-LABEL: s_fptosi_sat_f32_to_i32:
|
|
; PREGFX12: ; %bb.0:
|
|
; PREGFX12: v_cvt_i32_f32_e32 v2, s0
|
|
;
|
|
; GFX12-LABEL: s_fptosi_sat_f32_to_i32:
|
|
; GFX12: ; %bb.0:
|
|
; GFX12: s_cvt_i32_f32 s0, s0
|
|
; GFX12: v_mov_b32_e32 v2, s0
|
|
%result = call i32 @llvm.fptosi.sat.i32.f32(float %x)
|
|
store i32 %result, ptr addrspace(1) %out
|
|
ret void
|
|
}
|
|
|
|
define amdgpu_ps void @v_fptoui_sat_f32_to_i32(float %x, ptr addrspace(1) %out) {
|
|
; GCN-LABEL: v_fptoui_sat_f32_to_i32:
|
|
; GCN: ; %bb.0:
|
|
; GCN: v_cvt_u32_f32_e32 v0, v0
|
|
%result = call i32 @llvm.fptoui.sat.i32.f32(float %x)
|
|
store i32 %result, ptr addrspace(1) %out
|
|
ret void
|
|
}
|
|
|
|
define amdgpu_ps void @v_fptosi_sat_f32_to_i32(float %x, ptr addrspace(1) %out) {
|
|
; GCN-LABEL: v_fptosi_sat_f32_to_i32:
|
|
; GCN: ; %bb.0:
|
|
; GCN: v_cvt_i32_f32_e32 v0, v0
|
|
%result = call i32 @llvm.fptosi.sat.i32.f32(float %x)
|
|
store i32 %result, ptr addrspace(1) %out
|
|
ret void
|
|
}
|
|
|
|
define amdgpu_ps void @s_fptoui_sat_f64_to_i32(double inreg %x, ptr addrspace(1) %out) {
|
|
; GCN-LABEL: s_fptoui_sat_f64_to_i32:
|
|
; GCN: ; %bb.0:
|
|
; GCN: v_cvt_u32_f64_e32 v2, s[0:1]
|
|
%result = call i32 @llvm.fptoui.sat.i32.f64(double %x)
|
|
store i32 %result, ptr addrspace(1) %out
|
|
ret void
|
|
}
|
|
|
|
define amdgpu_ps void @s_fptosi_sat_f64_to_i32(double inreg %x, ptr addrspace(1) %out) {
|
|
; GCN-LABEL: s_fptosi_sat_f64_to_i32:
|
|
; GCN: ; %bb.0:
|
|
; GCN: v_cvt_i32_f64_e32 v2, s[0:1]
|
|
%result = call i32 @llvm.fptosi.sat.i32.f64(double %x)
|
|
store i32 %result, ptr addrspace(1) %out
|
|
ret void
|
|
}
|
|
|
|
define amdgpu_ps void @v_fptoui_sat_f64_to_i32(double %x, ptr addrspace(1) %out) {
|
|
; GCN-LABEL: v_fptoui_sat_f64_to_i32:
|
|
; GCN: ; %bb.0:
|
|
; GCN: v_cvt_u32_f64_e32 v0, v[0:1]
|
|
%result = call i32 @llvm.fptoui.sat.i32.f64(double %x)
|
|
store i32 %result, ptr addrspace(1) %out
|
|
ret void
|
|
}
|
|
|
|
define amdgpu_ps void @v_fptosi_sat_f64_to_i32(double %x, ptr addrspace(1) %out) {
|
|
; GCN-LABEL: v_fptosi_sat_f64_to_i32:
|
|
; GCN: ; %bb.0:
|
|
; GCN: v_cvt_i32_f64_e32 v0, v[0:1]
|
|
%result = call i32 @llvm.fptosi.sat.i32.f64(double %x)
|
|
store i32 %result, ptr addrspace(1) %out
|
|
ret void
|
|
}
|
|
|
|
define amdgpu_ps void @s_uitofp_i16_to_f16(i16 inreg %x, ptr addrspace(1) %out) {
|
|
; PREGFX12-FAKE16-LABEL: s_uitofp_i16_to_f16:
|
|
; PREGFX12-FAKE16: ; %bb.0:
|
|
; PREGFX12-FAKE16: v_cvt_f16_u16_e32 v2, s0
|
|
;
|
|
; TRUE16-LABEL: s_uitofp_i16_to_f16:
|
|
; TRUE16: ; %bb.0:
|
|
; TRUE16: v_cvt_f16_u16_e32 v2.l, s0
|
|
;
|
|
; GFX12-LABEL: s_uitofp_i16_to_f16:
|
|
; GFX12: ; %bb.0:
|
|
; GFX12: v_cvt_f16_u16_e32 v2.l, s0
|
|
%result = uitofp i16 %x to half
|
|
store half %result, ptr addrspace(1) %out
|
|
ret void
|
|
}
|
|
|
|
define amdgpu_ps void @s_sitofp_i16_to_f16(i16 inreg %x, ptr addrspace(1) %out) {
|
|
; PREGFX12-FAKE16-LABEL: s_sitofp_i16_to_f16:
|
|
; PREGFX12-FAKE16: ; %bb.0:
|
|
; PREGFX12-FAKE16: v_cvt_f16_i16_e32 v2, s0
|
|
;
|
|
; TRUE16-LABEL: s_sitofp_i16_to_f16:
|
|
; TRUE16: ; %bb.0:
|
|
; TRUE16: v_cvt_f16_i16_e32 v2.l, s0
|
|
;
|
|
; GFX12-LABEL: s_sitofp_i16_to_f16:
|
|
; GFX12: ; %bb.0:
|
|
; GFX12: v_cvt_f16_i16_e32 v2.l, s0
|
|
%result = sitofp i16 %x to half
|
|
store half %result, ptr addrspace(1) %out
|
|
ret void
|
|
}
|
|
|
|
define amdgpu_ps void @v_uitofp_i16_to_f16(i16 %x, ptr addrspace(1) %out) {
|
|
; PREGFX12-FAKE16-LABEL: v_uitofp_i16_to_f16:
|
|
; PREGFX12-FAKE16: ; %bb.0:
|
|
; PREGFX12-FAKE16: v_cvt_f16_u16_e32 v0, v0
|
|
;
|
|
; TRUE16-LABEL: v_uitofp_i16_to_f16:
|
|
; TRUE16: ; %bb.0:
|
|
; TRUE16: v_cvt_f16_u16_e32 v0.l, v0.l
|
|
;
|
|
; GFX12-LABEL: v_uitofp_i16_to_f16:
|
|
; GFX12: ; %bb.0:
|
|
; GFX12: v_cvt_f16_u16_e32 v0.l, v0.l
|
|
%result = uitofp i16 %x to half
|
|
store half %result, ptr addrspace(1) %out
|
|
ret void
|
|
}
|
|
|
|
define amdgpu_ps void @v_sitofp_i16_to_f16(i16 %x, ptr addrspace(1) %out) {
|
|
; PREGFX12-FAKE16-LABEL: v_sitofp_i16_to_f16:
|
|
; PREGFX12-FAKE16: ; %bb.0:
|
|
; PREGFX12-FAKE16: v_cvt_f16_i16_e32 v0, v0
|
|
;
|
|
; TRUE16-LABEL: v_sitofp_i16_to_f16:
|
|
; TRUE16: ; %bb.0:
|
|
; TRUE16: v_cvt_f16_i16_e32 v0.l, v0.l
|
|
;
|
|
; GFX12-LABEL: v_sitofp_i16_to_f16:
|
|
; GFX12: ; %bb.0:
|
|
; GFX12: v_cvt_f16_i16_e32 v0.l, v0.l
|
|
%result = sitofp i16 %x to half
|
|
store half %result, ptr addrspace(1) %out
|
|
ret void
|
|
}
|
|
|
|
define amdgpu_ps void @s_uitofp_i32_to_f16(i32 inreg %x, ptr addrspace(1) %out) {
|
|
; PREGFX12-FAKE16-LABEL: s_uitofp_i32_to_f16:
|
|
; PREGFX12-FAKE16: ; %bb.0:
|
|
; PREGFX12-FAKE16: v_cvt_f32_u32_e32 v2, s0
|
|
; PREGFX12-FAKE16: v_cvt_f16_f32_e32 v2, v2
|
|
;
|
|
; TRUE16-LABEL: s_uitofp_i32_to_f16:
|
|
; TRUE16: ; %bb.0:
|
|
; TRUE16: v_cvt_f32_u32_e32 v2, s0
|
|
; TRUE16: v_cvt_f16_f32_e32 v2.l, v2
|
|
;
|
|
; GFX12-LABEL: s_uitofp_i32_to_f16:
|
|
; GFX12: ; %bb.0:
|
|
; GFX12: s_cvt_f32_u32 s0, s0
|
|
; GFX12: s_cvt_f16_f32 s0, s0
|
|
; GFX12: v_mov_b16_e32 v2.l, s0
|
|
%result = uitofp i32 %x to half
|
|
store half %result, ptr addrspace(1) %out
|
|
ret void
|
|
}
|
|
|
|
define amdgpu_ps void @s_sitofp_i32_to_f16(i32 inreg %x, ptr addrspace(1) %out) {
|
|
; PREGFX12-FAKE16-LABEL: s_sitofp_i32_to_f16:
|
|
; PREGFX12-FAKE16: ; %bb.0:
|
|
; PREGFX12-FAKE16: v_cvt_f32_i32_e32 v2, s0
|
|
; PREGFX12-FAKE16: v_cvt_f16_f32_e32 v2, v2
|
|
;
|
|
; TRUE16-LABEL: s_sitofp_i32_to_f16:
|
|
; TRUE16: ; %bb.0:
|
|
; TRUE16: v_cvt_f32_i32_e32 v2, s0
|
|
; TRUE16: v_cvt_f16_f32_e32 v2.l, v2
|
|
;
|
|
; GFX12-LABEL: s_sitofp_i32_to_f16:
|
|
; GFX12: ; %bb.0:
|
|
; GFX12: s_cvt_f32_i32 s0, s0
|
|
; GFX12: s_cvt_f16_f32 s0, s0
|
|
; GFX12: v_mov_b16_e32 v2.l, s0
|
|
%result = sitofp i32 %x to half
|
|
store half %result, ptr addrspace(1) %out
|
|
ret void
|
|
}
|
|
|
|
define amdgpu_ps void @v_uitofp_i32_to_f16(i32 %x, ptr addrspace(1) %out) {
|
|
; PREGFX12-FAKE16-LABEL: v_uitofp_i32_to_f16:
|
|
; PREGFX12-FAKE16: ; %bb.0:
|
|
; PREGFX12-FAKE16: v_cvt_f32_u32_e32 v0, v0
|
|
; PREGFX12-FAKE16: v_cvt_f16_f32_e32 v0, v0
|
|
;
|
|
; TRUE16-LABEL: v_uitofp_i32_to_f16:
|
|
; TRUE16: ; %bb.0:
|
|
; TRUE16: v_cvt_f32_u32_e32 v0, v0
|
|
; TRUE16: v_cvt_f16_f32_e32 v0.l, v0
|
|
;
|
|
; GFX12-LABEL: v_uitofp_i32_to_f16:
|
|
; GFX12: ; %bb.0:
|
|
; GFX12: v_cvt_f32_u32_e32 v0, v0
|
|
; GFX12: v_cvt_f16_f32_e32 v0.l, v0
|
|
%result = uitofp i32 %x to half
|
|
store half %result, ptr addrspace(1) %out
|
|
ret void
|
|
}
|
|
|
|
define amdgpu_ps void @v_sitofp_i32_to_f16(i32 %x, ptr addrspace(1) %out) {
|
|
; PREGFX12-FAKE16-LABEL: v_sitofp_i32_to_f16:
|
|
; PREGFX12-FAKE16: ; %bb.0:
|
|
; PREGFX12-FAKE16: v_cvt_f32_i32_e32 v0, v0
|
|
; PREGFX12-FAKE16: v_cvt_f16_f32_e32 v0, v0
|
|
;
|
|
; TRUE16-LABEL: v_sitofp_i32_to_f16:
|
|
; TRUE16: ; %bb.0:
|
|
; TRUE16: v_cvt_f32_i32_e32 v0, v0
|
|
; TRUE16: v_cvt_f16_f32_e32 v0.l, v0
|
|
;
|
|
; GFX12-LABEL: v_sitofp_i32_to_f16:
|
|
; GFX12: ; %bb.0:
|
|
; GFX12: v_cvt_f32_i32_e32 v0, v0
|
|
; GFX12: v_cvt_f16_f32_e32 v0.l, v0
|
|
%result = sitofp i32 %x to half
|
|
store half %result, ptr addrspace(1) %out
|
|
ret void
|
|
}
|
|
|
|
define amdgpu_ps void @s_uitofp_i32_to_f32(i32 inreg %x, ptr addrspace(1) %out) {
|
|
; PREGFX12-LABEL: s_uitofp_i32_to_f32:
|
|
; PREGFX12: ; %bb.0:
|
|
; PREGFX12: v_cvt_f32_u32_e32 v2, s0
|
|
;
|
|
; GFX12-LABEL: s_uitofp_i32_to_f32:
|
|
; GFX12: ; %bb.0:
|
|
; GFX12: s_cvt_f32_u32 s0, s0
|
|
; GFX12: v_mov_b32_e32 v2, s0
|
|
%result = uitofp i32 %x to float
|
|
store float %result, ptr addrspace(1) %out
|
|
ret void
|
|
}
|
|
|
|
define amdgpu_ps void @s_sitofp_i32_to_f32(i32 inreg %x, ptr addrspace(1) %out) {
|
|
; PREGFX12-LABEL: s_sitofp_i32_to_f32:
|
|
; PREGFX12: ; %bb.0:
|
|
; PREGFX12: v_cvt_f32_i32_e32 v2, s0
|
|
;
|
|
; GFX12-LABEL: s_sitofp_i32_to_f32:
|
|
; GFX12: ; %bb.0:
|
|
; GFX12: s_cvt_f32_i32 s0, s0
|
|
; GFX12: v_mov_b32_e32 v2, s0
|
|
%result = sitofp i32 %x to float
|
|
store float %result, ptr addrspace(1) %out
|
|
ret void
|
|
}
|
|
|
|
define amdgpu_ps void @v_uitofp_i32_to_f32(i32 %x, ptr addrspace(1) %out) {
|
|
; GCN-LABEL: v_uitofp_i32_to_f32:
|
|
; GCN: ; %bb.0:
|
|
; GCN: v_cvt_f32_u32_e32 v0, v0
|
|
%result = uitofp i32 %x to float
|
|
store float %result, ptr addrspace(1) %out
|
|
ret void
|
|
}
|
|
|
|
define amdgpu_ps void @v_sitofp_i32_to_f32(i32 %x, ptr addrspace(1) %out) {
|
|
; GCN-LABEL: v_sitofp_i32_to_f32:
|
|
; GCN: ; %bb.0:
|
|
; GCN: v_cvt_f32_i32_e32 v0, v0
|
|
%result = sitofp i32 %x to float
|
|
store float %result, ptr addrspace(1) %out
|
|
ret void
|
|
}
|
|
|
|
define amdgpu_ps void @s_uitofp_i32_to_f64(i32 inreg %x, ptr addrspace(1) %out) {
|
|
; GCN-LABEL: s_uitofp_i32_to_f64:
|
|
; GCN: ; %bb.0:
|
|
; GCN: v_cvt_f64_u32_e32 v[2:3], s0
|
|
%result = uitofp i32 %x to double
|
|
store double %result, ptr addrspace(1) %out
|
|
ret void
|
|
}
|
|
|
|
define amdgpu_ps void @s_sitofp_i32_to_f64(i32 inreg %x, ptr addrspace(1) %out) {
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; GCN-LABEL: s_sitofp_i32_to_f64:
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; GCN: ; %bb.0:
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; GCN: v_cvt_f64_i32_e32 v[2:3], s0
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%result = sitofp i32 %x to double
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store double %result, ptr addrspace(1) %out
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ret void
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}
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define amdgpu_ps void @v_uitofp_i32_to_f64(i32 %x, ptr addrspace(1) %out) {
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; GCN-LABEL: v_uitofp_i32_to_f64:
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; GCN: ; %bb.0:
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; GCN: v_cvt_f64_u32_e32 v[3:4], v0
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%result = uitofp i32 %x to double
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store double %result, ptr addrspace(1) %out
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ret void
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}
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define amdgpu_ps void @v_sitofp_i32_to_f64(i32 %x, ptr addrspace(1) %out) {
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; GCN-LABEL: v_sitofp_i32_to_f64:
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; GCN: ; %bb.0:
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; GCN: v_cvt_f64_i32_e32 v[3:4], v0
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%result = sitofp i32 %x to double
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store double %result, ptr addrspace(1) %out
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ret void
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}
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define amdgpu_ps float @fpext_hif16_to_32(<2 x half> inreg %val) {
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; PREGFX12-LABEL: fpext_hif16_to_32:
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; PREGFX12: ; %bb.0:
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; PREGFX12: s_lshr_b32 s0, s0, 16
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; PREGFX12: v_cvt_f32_f16_e32 v0, s0
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; PREGFX12: ; return to shader part epilog
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;
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; GFX12-LABEL: fpext_hif16_to_32:
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; GFX12: ; %bb.0:
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; GFX12: s_cvt_hi_f32_f16 s0, s0
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; GFX12: v_mov_b32_e32 v0, s0
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; GFX12: ; return to shader part epilog
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%hielt = extractelement <2 x half> %val, i32 1
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%res = fpext half %hielt to float
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ret float %res
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}
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;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
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; FAKE16: {{.*}}
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