derek.holloway
7502bf64a4
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177 lines
9.8 KiB
LLVM
177 lines
9.8 KiB
LLVM
; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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; RUN: llc -global-isel -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -stop-after=legalizer < %s | FileCheck -check-prefix=GCN %s
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; RUN: llc -global-isel -mtriple=amdgcn-amd-amdpal -mcpu=hawaii -stop-after=legalizer < %s | FileCheck -check-prefix=GCN-PAL %s
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@external_constant = external addrspace(4) constant i32, align 4
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@external_constant32 = external addrspace(6) constant i32, align 4
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@external_global = external addrspace(1) global i32, align 4
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@external_other = external addrspace(999) global i32, align 4
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@internal_constant = internal addrspace(4) constant i32 9, align 4
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@internal_constant32 = internal addrspace(6) constant i32 9, align 4
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@internal_global = internal addrspace(1) global i32 9, align 4
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@internal_other = internal addrspace(999) global i32 9, align 4
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define ptr addrspace(4) @external_constant_got() {
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; GCN-LABEL: name: external_constant_got
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; GCN: bb.1 (%ir-block.0):
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; GCN-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p4) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @external_constant, target-flags(amdgpu-gotprel32-hi) @external_constant, implicit-def $scc
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; GCN-NEXT: [[LOAD:%[0-9]+]]:_(p4) = G_LOAD [[SI_PC_ADD_REL_OFFSET]](p4) :: (dereferenceable invariant load (p4) from got, addrspace 4)
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; GCN-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](p4)
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; GCN-NEXT: $vgpr0 = COPY [[UV]](s32)
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; GCN-NEXT: $vgpr1 = COPY [[UV1]](s32)
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; GCN-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1
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;
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; GCN-PAL-LABEL: name: external_constant_got
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; GCN-PAL: bb.1 (%ir-block.0):
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; GCN-PAL-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-lo) @external_constant
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; GCN-PAL-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-hi) @external_constant
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; GCN-PAL-NEXT: $vgpr0 = COPY [[S_MOV_B32_]](s32)
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; GCN-PAL-NEXT: $vgpr1 = COPY [[S_MOV_B32_1]](s32)
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; GCN-PAL-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1
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ret ptr addrspace(4) @external_constant
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}
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define ptr addrspace(1) @external_global_got() {
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; GCN-LABEL: name: external_global_got
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; GCN: bb.1 (%ir-block.0):
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; GCN-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p4) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @external_global, target-flags(amdgpu-gotprel32-hi) @external_global, implicit-def $scc
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; GCN-NEXT: [[LOAD:%[0-9]+]]:_(p1) = G_LOAD [[SI_PC_ADD_REL_OFFSET]](p4) :: (dereferenceable invariant load (p1) from got, addrspace 4)
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; GCN-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](p1)
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; GCN-NEXT: $vgpr0 = COPY [[UV]](s32)
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; GCN-NEXT: $vgpr1 = COPY [[UV1]](s32)
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; GCN-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1
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;
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; GCN-PAL-LABEL: name: external_global_got
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; GCN-PAL: bb.1 (%ir-block.0):
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; GCN-PAL-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-lo) @external_global
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; GCN-PAL-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-hi) @external_global
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; GCN-PAL-NEXT: $vgpr0 = COPY [[S_MOV_B32_]](s32)
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; GCN-PAL-NEXT: $vgpr1 = COPY [[S_MOV_B32_1]](s32)
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; GCN-PAL-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1
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ret ptr addrspace(1) @external_global
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}
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define ptr addrspace(999) @external_other_got() {
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; GCN-LABEL: name: external_other_got
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; GCN: bb.1 (%ir-block.0):
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; GCN-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p4) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @external_other, target-flags(amdgpu-gotprel32-hi) @external_other, implicit-def $scc
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; GCN-NEXT: [[LOAD:%[0-9]+]]:_(p999) = G_LOAD [[SI_PC_ADD_REL_OFFSET]](p4) :: (dereferenceable invariant load (p999) from got, addrspace 4)
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; GCN-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[LOAD]](p999)
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; GCN-NEXT: $vgpr0 = COPY [[UV]](s32)
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; GCN-NEXT: $vgpr1 = COPY [[UV1]](s32)
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; GCN-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1
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;
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; GCN-PAL-LABEL: name: external_other_got
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; GCN-PAL: bb.1 (%ir-block.0):
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; GCN-PAL-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-lo) @external_other
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; GCN-PAL-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-hi) @external_other
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; GCN-PAL-NEXT: $vgpr0 = COPY [[S_MOV_B32_]](s32)
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; GCN-PAL-NEXT: $vgpr1 = COPY [[S_MOV_B32_1]](s32)
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; GCN-PAL-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1
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ret ptr addrspace(999) @external_other
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}
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define ptr addrspace(4) @internal_constant_pcrel() {
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; GCN-LABEL: name: internal_constant_pcrel
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; GCN: bb.1 (%ir-block.0):
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; GCN-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p4) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-rel32-lo) @internal_constant, target-flags(amdgpu-rel32-hi) @internal_constant, implicit-def $scc
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; GCN-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SI_PC_ADD_REL_OFFSET]](p4)
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; GCN-NEXT: $vgpr0 = COPY [[UV]](s32)
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; GCN-NEXT: $vgpr1 = COPY [[UV1]](s32)
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; GCN-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1
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;
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; GCN-PAL-LABEL: name: internal_constant_pcrel
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; GCN-PAL: bb.1 (%ir-block.0):
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; GCN-PAL-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-lo) @internal_constant
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; GCN-PAL-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-hi) @internal_constant
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; GCN-PAL-NEXT: $vgpr0 = COPY [[S_MOV_B32_]](s32)
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; GCN-PAL-NEXT: $vgpr1 = COPY [[S_MOV_B32_1]](s32)
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; GCN-PAL-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1
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ret ptr addrspace(4) @internal_constant
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}
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define ptr addrspace(1) @internal_global_pcrel() {
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; GCN-LABEL: name: internal_global_pcrel
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; GCN: bb.1 (%ir-block.0):
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; GCN-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p1) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-rel32-lo) @internal_global, target-flags(amdgpu-rel32-hi) @internal_global, implicit-def $scc
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; GCN-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SI_PC_ADD_REL_OFFSET]](p1)
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; GCN-NEXT: $vgpr0 = COPY [[UV]](s32)
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; GCN-NEXT: $vgpr1 = COPY [[UV1]](s32)
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; GCN-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1
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;
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; GCN-PAL-LABEL: name: internal_global_pcrel
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; GCN-PAL: bb.1 (%ir-block.0):
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; GCN-PAL-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-lo) @internal_global
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; GCN-PAL-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-hi) @internal_global
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; GCN-PAL-NEXT: $vgpr0 = COPY [[S_MOV_B32_]](s32)
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; GCN-PAL-NEXT: $vgpr1 = COPY [[S_MOV_B32_1]](s32)
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; GCN-PAL-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1
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ret ptr addrspace(1) @internal_global
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}
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define ptr addrspace(999) @internal_other_pcrel() {
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; GCN-LABEL: name: internal_other_pcrel
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; GCN: bb.1 (%ir-block.0):
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; GCN-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p999) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-rel32-lo) @internal_other, target-flags(amdgpu-rel32-hi) @internal_other, implicit-def $scc
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; GCN-NEXT: [[UV:%[0-9]+]]:_(s32), [[UV1:%[0-9]+]]:_(s32) = G_UNMERGE_VALUES [[SI_PC_ADD_REL_OFFSET]](p999)
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; GCN-NEXT: $vgpr0 = COPY [[UV]](s32)
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; GCN-NEXT: $vgpr1 = COPY [[UV1]](s32)
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; GCN-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1
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;
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; GCN-PAL-LABEL: name: internal_other_pcrel
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; GCN-PAL: bb.1 (%ir-block.0):
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; GCN-PAL-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-lo) @internal_other
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; GCN-PAL-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32(s32) = S_MOV_B32 target-flags(amdgpu-abs32-hi) @internal_other
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; GCN-PAL-NEXT: $vgpr0 = COPY [[S_MOV_B32_]](s32)
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; GCN-PAL-NEXT: $vgpr1 = COPY [[S_MOV_B32_1]](s32)
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; GCN-PAL-NEXT: SI_RETURN implicit $vgpr0, implicit $vgpr1
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ret ptr addrspace(999) @internal_other
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}
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define ptr addrspace(6) @external_constant32_got() {
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; GCN-LABEL: name: external_constant32_got
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; GCN: bb.1 (%ir-block.0):
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; GCN-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p4) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-gotprel32-lo) @external_constant32, target-flags(amdgpu-gotprel32-hi) @external_constant32, implicit-def $scc
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; GCN-NEXT: [[LOAD:%[0-9]+]]:_(p4) = G_LOAD [[SI_PC_ADD_REL_OFFSET]](p4) :: (dereferenceable invariant load (p4) from got, addrspace 4)
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; GCN-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[LOAD]](p4)
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; GCN-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[PTRTOINT]](s64)
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; GCN-NEXT: [[INTTOPTR:%[0-9]+]]:_(p6) = G_INTTOPTR [[TRUNC]](s32)
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; GCN-NEXT: $vgpr0 = COPY [[INTTOPTR]](p6)
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; GCN-NEXT: SI_RETURN implicit $vgpr0
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;
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; GCN-PAL-LABEL: name: external_constant32_got
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; GCN-PAL: bb.1 (%ir-block.0):
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; GCN-PAL-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(p6) = S_MOV_B32 target-flags(amdgpu-abs32-lo) @external_constant32
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; GCN-PAL-NEXT: $vgpr0 = COPY [[S_MOV_B32_]](p6)
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; GCN-PAL-NEXT: SI_RETURN implicit $vgpr0
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ret ptr addrspace(6) @external_constant32
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}
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define ptr addrspace(6) @internal_constant32_pcrel() {
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; GCN-LABEL: name: internal_constant32_pcrel
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; GCN: bb.1 (%ir-block.0):
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; GCN-NEXT: [[SI_PC_ADD_REL_OFFSET:%[0-9]+]]:sreg_64(p4) = SI_PC_ADD_REL_OFFSET target-flags(amdgpu-rel32-lo) @internal_constant32, target-flags(amdgpu-rel32-hi) @internal_constant32, implicit-def $scc
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; GCN-NEXT: [[PTRTOINT:%[0-9]+]]:_(s64) = G_PTRTOINT [[SI_PC_ADD_REL_OFFSET]](p4)
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; GCN-NEXT: [[TRUNC:%[0-9]+]]:_(s32) = G_TRUNC [[PTRTOINT]](s64)
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; GCN-NEXT: [[INTTOPTR:%[0-9]+]]:_(p6) = G_INTTOPTR [[TRUNC]](s32)
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; GCN-NEXT: $vgpr0 = COPY [[INTTOPTR]](p6)
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; GCN-NEXT: SI_RETURN implicit $vgpr0
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;
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; GCN-PAL-LABEL: name: internal_constant32_pcrel
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; GCN-PAL: bb.1 (%ir-block.0):
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; GCN-PAL-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32(p6) = S_MOV_B32 target-flags(amdgpu-abs32-lo) @internal_constant32
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; GCN-PAL-NEXT: $vgpr0 = COPY [[S_MOV_B32_]](p6)
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; GCN-PAL-NEXT: SI_RETURN implicit $vgpr0
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ret ptr addrspace(6) @internal_constant32
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}
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