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66 lines
2.2 KiB
YAML
66 lines
2.2 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs -global-isel-abort=2 -pass-remarks-missed='gisel*' %s -o - 2> %t | FileCheck -check-prefix=GCN %s
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# RUN: FileCheck -check-prefix=ERR %s < %t
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# ERR: remark: <unknown>:0:0: cannot select: %1:sgpr(s32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), %0:sgpr(s32) (in function: readfirstlane_s)
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---
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name: readfirstlane_v
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0
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; GCN-LABEL: name: readfirstlane_v
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; GCN: liveins: $vgpr0
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN-NEXT: [[V_READFIRSTLANE_B32_:%[0-9]+]]:sreg_32_xm0 = V_READFIRSTLANE_B32 [[COPY]], implicit $exec
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; GCN-NEXT: S_ENDPGM 0, implicit [[V_READFIRSTLANE_B32_]]
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%0:vgpr(s32) = COPY $vgpr0
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%1:sgpr(s32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), %0
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S_ENDPGM 0, implicit %1
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...
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---
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name: readfirstlane_v_imm
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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; GCN-LABEL: name: readfirstlane_v_imm
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; GCN: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 123, implicit $exec
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; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY [[V_MOV_B32_e32_]]
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; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 [[COPY]]
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; GCN-NEXT: S_ENDPGM 0, implicit [[S_MOV_B32_]]
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%0:vgpr(s32) = G_CONSTANT i32 123
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%1:sgpr(s32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), %0
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S_ENDPGM 0, implicit %1
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...
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# Make sure this fails to select
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---
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name: readfirstlane_s
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GCN-LABEL: name: readfirstlane_s
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; GCN: liveins: $sgpr0
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; GCN-NEXT: {{ $}}
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; GCN-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; GCN-NEXT: [[INT:%[0-9]+]]:sgpr(s32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), [[COPY]](s32)
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; GCN-NEXT: S_ENDPGM 0, implicit [[INT]](s32)
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = G_INTRINSIC_CONVERGENT intrinsic(@llvm.amdgcn.readfirstlane), %0
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S_ENDPGM 0, implicit %1
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...
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