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592 lines
27 KiB
YAML
592 lines
27 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=instruction-select -global-isel-abort=2 -disable-gisel-legality-check -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefix=GFX8 %s
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# RUN: FileCheck --check-prefix=ERR %s < %t
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# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=instruction-select -global-isel-abort=2 -disable-gisel-legality-check -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefix=GFX9 %s
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# RUN: FileCheck --check-prefix=ERR %s < %t
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# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -global-isel-abort=2 -disable-gisel-legality-check -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefix=GFX10 %s
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# RUN: FileCheck --check-prefix=ERR %s < %t
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# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=+real-true16 -run-pass=instruction-select -global-isel-abort=2 -disable-gisel-legality-check -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefixes=GFX11,GFX11-TRUE16 %s
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# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -mattr=-real-true16 -run-pass=instruction-select -global-isel-abort=2 -disable-gisel-legality-check -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefixes=GFX11,GFX11-FAKE16 %s
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# RUN: FileCheck --check-prefix=ERR %s < %t
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# ERR-NOT: remark
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# ERR: remark: <unknown>:0:0: cannot select: %4:sgpr(s16) = G_ASHR %2:sgpr, %3:sgpr(s16) (in function: ashr_s16_s16_ss)
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# ERR-NEXT: remark: <unknown>:0:0: cannot select: %3:vgpr(s16) = G_ASHR %2:vgpr, %1:vgpr(s32) (in function: ashr_s16_s32_vv)
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# ERR-NEXT: remark: <unknown>:0:0: cannot select: %3:sgpr(s16) = G_ASHR %2:sgpr, %1:sgpr(s32) (in function: ashr_s16_s32_ss)
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# ERR-NEXT: remark: <unknown>:0:0: cannot select: %3:vgpr(s16) = G_ASHR %2:sgpr, %1:vgpr(s32) (in function: ashr_s16_s32_sv)
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# ERR-NEXT: remark: <unknown>:0:0: cannot select: %3:vgpr(s16) = G_ASHR %2:vgpr, %1:sgpr(s32) (in function: ashr_s16_s32_vs)
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# ERR-NOT: remark
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---
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name: ashr_s16_s16_ss
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0, $sgpr1
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; GFX8-LABEL: name: ashr_s16_s16_ss
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; GFX8: liveins: $sgpr0, $sgpr1
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; GFX8-NEXT: {{ $}}
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; GFX8-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; GFX8-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
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; GFX8-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
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; GFX8-NEXT: [[TRUNC1:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY1]](s32)
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; GFX8-NEXT: [[ASHR:%[0-9]+]]:sgpr(s16) = G_ASHR [[TRUNC]], [[TRUNC1]](s16)
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; GFX8-NEXT: S_ENDPGM 0, implicit [[ASHR]](s16)
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;
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; GFX9-LABEL: name: ashr_s16_s16_ss
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; GFX9: liveins: $sgpr0, $sgpr1
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; GFX9-NEXT: {{ $}}
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; GFX9-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; GFX9-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
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; GFX9-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
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; GFX9-NEXT: [[TRUNC1:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY1]](s32)
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; GFX9-NEXT: [[ASHR:%[0-9]+]]:sgpr(s16) = G_ASHR [[TRUNC]], [[TRUNC1]](s16)
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; GFX9-NEXT: S_ENDPGM 0, implicit [[ASHR]](s16)
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;
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; GFX10-LABEL: name: ashr_s16_s16_ss
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; GFX10: liveins: $sgpr0, $sgpr1
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; GFX10-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
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; GFX10-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
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; GFX10-NEXT: [[TRUNC1:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY1]](s32)
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; GFX10-NEXT: [[ASHR:%[0-9]+]]:sgpr(s16) = G_ASHR [[TRUNC]], [[TRUNC1]](s16)
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; GFX10-NEXT: S_ENDPGM 0, implicit [[ASHR]](s16)
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;
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; GFX11-LABEL: name: ashr_s16_s16_ss
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; GFX11: liveins: $sgpr0, $sgpr1
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; GFX11-NEXT: {{ $}}
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; GFX11-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
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; GFX11-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
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; GFX11-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
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; GFX11-NEXT: [[TRUNC1:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY1]](s32)
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; GFX11-NEXT: [[ASHR:%[0-9]+]]:sgpr(s16) = G_ASHR [[TRUNC]], [[TRUNC1]](s16)
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; GFX11-NEXT: S_ENDPGM 0, implicit [[ASHR]](s16)
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = COPY $sgpr1
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%2:sgpr(s16) = G_TRUNC %0
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%3:sgpr(s16) = G_TRUNC %1
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%4:sgpr(s16) = G_ASHR %2, %3
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S_ENDPGM 0, implicit %4
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...
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---
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name: ashr_s16_s16_vs
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0, $vgpr0
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; GFX8-LABEL: name: ashr_s16_s16_vs
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; GFX8: liveins: $sgpr0, $vgpr0
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; GFX8-NEXT: {{ $}}
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; GFX8-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX8-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX8-NEXT: [[V_ASHRREV_I16_e64_:%[0-9]+]]:vgpr_32 = V_ASHRREV_I16_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX8-NEXT: S_ENDPGM 0, implicit [[V_ASHRREV_I16_e64_]]
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;
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; GFX9-LABEL: name: ashr_s16_s16_vs
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; GFX9: liveins: $sgpr0, $vgpr0
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; GFX9-NEXT: {{ $}}
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; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX9-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX9-NEXT: [[V_ASHRREV_I16_e64_:%[0-9]+]]:vgpr_32 = V_ASHRREV_I16_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX9-NEXT: S_ENDPGM 0, implicit [[V_ASHRREV_I16_e64_]]
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;
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; GFX10-LABEL: name: ashr_s16_s16_vs
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; GFX10: liveins: $sgpr0, $vgpr0
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX10-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX10-NEXT: [[V_ASHRREV_I16_opsel_e64_:%[0-9]+]]:vgpr_32 = V_ASHRREV_I16_opsel_e64 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $exec
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; GFX10-NEXT: S_ENDPGM 0, implicit [[V_ASHRREV_I16_opsel_e64_]]
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;
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; GFX11-TRUE16-LABEL: name: ashr_s16_s16_vs
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; GFX11-TRUE16: liveins: $sgpr0, $vgpr0
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; GFX11-TRUE16-NEXT: {{ $}}
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; GFX11-TRUE16-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX11-TRUE16-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX11-TRUE16-NEXT: [[COPY2:%[0-9]+]]:vgpr_16 = COPY [[COPY]].lo16
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; GFX11-TRUE16-NEXT: [[V_ASHRREV_I16_t16_e64_:%[0-9]+]]:vgpr_16 = V_ASHRREV_I16_t16_e64 0, [[COPY1]], 0, [[COPY2]], 0, implicit $exec
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; GFX11-TRUE16-NEXT: S_ENDPGM 0, implicit [[V_ASHRREV_I16_t16_e64_]]
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;
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; GFX11-FAKE16-LABEL: name: ashr_s16_s16_vs
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; GFX11-FAKE16: liveins: $sgpr0, $vgpr0
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; GFX11-FAKE16-NEXT: {{ $}}
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; GFX11-FAKE16-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX11-FAKE16-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX11-FAKE16-NEXT: [[V_ASHRREV_I16_fake16_e64_:%[0-9]+]]:vgpr_32 = V_ASHRREV_I16_fake16_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX11-FAKE16-NEXT: S_ENDPGM 0, implicit [[V_ASHRREV_I16_fake16_e64_]]
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%0:vgpr(s32) = COPY $vgpr0
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%1:sgpr(s32) = COPY $sgpr0
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%2:vgpr(s16) = G_TRUNC %0
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%3:sgpr(s16) = G_TRUNC %1
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%4:vgpr(s16) = G_ASHR %2, %3
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S_ENDPGM 0, implicit %4
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...
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---
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name: ashr_s16_s32_vv
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; GFX8-LABEL: name: ashr_s16_s32_vv
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; GFX8: liveins: $vgpr0, $vgpr1
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; GFX8-NEXT: {{ $}}
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; GFX8-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; GFX8-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
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; GFX8-NEXT: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
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; GFX8-NEXT: [[ASHR:%[0-9]+]]:vgpr(s16) = G_ASHR [[TRUNC]], [[COPY1]](s32)
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; GFX8-NEXT: S_ENDPGM 0, implicit [[ASHR]](s16)
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;
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; GFX9-LABEL: name: ashr_s16_s32_vv
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; GFX9: liveins: $vgpr0, $vgpr1
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; GFX9-NEXT: {{ $}}
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; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
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; GFX9-NEXT: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
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; GFX9-NEXT: [[ASHR:%[0-9]+]]:vgpr(s16) = G_ASHR [[TRUNC]], [[COPY1]](s32)
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; GFX9-NEXT: S_ENDPGM 0, implicit [[ASHR]](s16)
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;
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; GFX10-LABEL: name: ashr_s16_s32_vv
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; GFX10: liveins: $vgpr0, $vgpr1
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; GFX10-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
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; GFX10-NEXT: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
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; GFX10-NEXT: [[ASHR:%[0-9]+]]:vgpr(s16) = G_ASHR [[TRUNC]], [[COPY1]](s32)
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; GFX10-NEXT: S_ENDPGM 0, implicit [[ASHR]](s16)
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;
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; GFX11-LABEL: name: ashr_s16_s32_vv
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; GFX11: liveins: $vgpr0, $vgpr1
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; GFX11-NEXT: {{ $}}
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; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
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; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr1
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; GFX11-NEXT: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
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; GFX11-NEXT: [[ASHR:%[0-9]+]]:vgpr(s16) = G_ASHR [[TRUNC]], [[COPY1]](s32)
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; GFX11-NEXT: S_ENDPGM 0, implicit [[ASHR]](s16)
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s32) = COPY $vgpr1
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%2:vgpr(s16) = G_TRUNC %0
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%3:vgpr(s16) = G_ASHR %2, %1
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S_ENDPGM 0, implicit %3
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...
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---
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name: ashr_s16_s16_vv
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1
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; GFX8-LABEL: name: ashr_s16_s16_vv
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; GFX8: liveins: $vgpr0, $vgpr1
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; GFX8-NEXT: {{ $}}
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; GFX8-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX8-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX8-NEXT: [[V_ASHRREV_I16_e64_:%[0-9]+]]:vgpr_32 = V_ASHRREV_I16_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX8-NEXT: S_ENDPGM 0, implicit [[V_ASHRREV_I16_e64_]]
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;
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; GFX9-LABEL: name: ashr_s16_s16_vv
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; GFX9: liveins: $vgpr0, $vgpr1
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; GFX9-NEXT: {{ $}}
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; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX9-NEXT: [[V_ASHRREV_I16_e64_:%[0-9]+]]:vgpr_32 = V_ASHRREV_I16_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX9-NEXT: S_ENDPGM 0, implicit [[V_ASHRREV_I16_e64_]]
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;
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; GFX10-LABEL: name: ashr_s16_s16_vv
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; GFX10: liveins: $vgpr0, $vgpr1
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; GFX10-NEXT: {{ $}}
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; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX10-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX10-NEXT: [[V_ASHRREV_I16_opsel_e64_:%[0-9]+]]:vgpr_32 = V_ASHRREV_I16_opsel_e64 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $exec
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; GFX10-NEXT: S_ENDPGM 0, implicit [[V_ASHRREV_I16_opsel_e64_]]
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;
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; GFX11-TRUE16-LABEL: name: ashr_s16_s16_vv
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; GFX11-TRUE16: liveins: $vgpr0, $vgpr1
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; GFX11-TRUE16-NEXT: {{ $}}
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; GFX11-TRUE16-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX11-TRUE16-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX11-TRUE16-NEXT: [[COPY2:%[0-9]+]]:vgpr_16 = COPY [[COPY]].lo16
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; GFX11-TRUE16-NEXT: [[COPY3:%[0-9]+]]:vgpr_16 = COPY [[COPY1]].lo16
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; GFX11-TRUE16-NEXT: [[V_ASHRREV_I16_t16_e64_:%[0-9]+]]:vgpr_16 = V_ASHRREV_I16_t16_e64 0, [[COPY3]], 0, [[COPY2]], 0, implicit $exec
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; GFX11-TRUE16-NEXT: S_ENDPGM 0, implicit [[V_ASHRREV_I16_t16_e64_]]
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;
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; GFX11-FAKE16-LABEL: name: ashr_s16_s16_vv
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; GFX11-FAKE16: liveins: $vgpr0, $vgpr1
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; GFX11-FAKE16-NEXT: {{ $}}
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; GFX11-FAKE16-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX11-FAKE16-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX11-FAKE16-NEXT: [[V_ASHRREV_I16_fake16_e64_:%[0-9]+]]:vgpr_32 = V_ASHRREV_I16_fake16_e64 [[COPY1]], [[COPY]], implicit $exec
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; GFX11-FAKE16-NEXT: S_ENDPGM 0, implicit [[V_ASHRREV_I16_fake16_e64_]]
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s32) = COPY $vgpr1
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%2:vgpr(s16) = G_TRUNC %0
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%3:vgpr(s16) = G_TRUNC %1
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%4:vgpr(s16) = G_ASHR %2, %3
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S_ENDPGM 0, implicit %4
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...
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---
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|
name: ashr_s16_s16_vv_zext_to_s32
|
|
legalized: true
|
|
regBankSelected: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0, $vgpr1
|
|
|
|
; GFX8-LABEL: name: ashr_s16_s16_vv_zext_to_s32
|
|
; GFX8: liveins: $vgpr0, $vgpr1
|
|
; GFX8-NEXT: {{ $}}
|
|
; GFX8-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; GFX8-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
|
|
; GFX8-NEXT: [[V_ASHRREV_I16_e64_:%[0-9]+]]:vgpr_32 = V_ASHRREV_I16_e64 [[COPY1]], [[COPY]], implicit $exec
|
|
; GFX8-NEXT: S_ENDPGM 0, implicit [[V_ASHRREV_I16_e64_]]
|
|
;
|
|
; GFX9-LABEL: name: ashr_s16_s16_vv_zext_to_s32
|
|
; GFX9: liveins: $vgpr0, $vgpr1
|
|
; GFX9-NEXT: {{ $}}
|
|
; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
|
|
; GFX9-NEXT: [[V_ASHRREV_I16_e64_:%[0-9]+]]:vgpr_32 = V_ASHRREV_I16_e64 [[COPY1]], [[COPY]], implicit $exec
|
|
; GFX9-NEXT: S_ENDPGM 0, implicit [[V_ASHRREV_I16_e64_]]
|
|
;
|
|
; GFX10-LABEL: name: ashr_s16_s16_vv_zext_to_s32
|
|
; GFX10: liveins: $vgpr0, $vgpr1
|
|
; GFX10-NEXT: {{ $}}
|
|
; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; GFX10-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
|
|
; GFX10-NEXT: [[V_ASHRREV_I16_opsel_e64_:%[0-9]+]]:vgpr_32 = V_ASHRREV_I16_opsel_e64 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $exec
|
|
; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 65535
|
|
; GFX10-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[S_MOV_B32_]], [[V_ASHRREV_I16_opsel_e64_]], implicit $exec
|
|
; GFX10-NEXT: S_ENDPGM 0, implicit [[V_AND_B32_e64_]]
|
|
;
|
|
; GFX11-TRUE16-LABEL: name: ashr_s16_s16_vv_zext_to_s32
|
|
; GFX11-TRUE16: liveins: $vgpr0, $vgpr1
|
|
; GFX11-TRUE16-NEXT: {{ $}}
|
|
; GFX11-TRUE16-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; GFX11-TRUE16-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
|
|
; GFX11-TRUE16-NEXT: [[COPY2:%[0-9]+]]:vgpr_16 = COPY [[COPY]].lo16
|
|
; GFX11-TRUE16-NEXT: [[COPY3:%[0-9]+]]:vgpr_16 = COPY [[COPY1]].lo16
|
|
; GFX11-TRUE16-NEXT: [[V_ASHRREV_I16_t16_e64_:%[0-9]+]]:vgpr_16 = V_ASHRREV_I16_t16_e64 0, [[COPY3]], 0, [[COPY2]], 0, implicit $exec
|
|
; GFX11-TRUE16-NEXT: [[V_MOV_B16_t16_e64_:%[0-9]+]]:vgpr_16 = V_MOV_B16_t16_e64 0, 0, 0, implicit $exec
|
|
; GFX11-TRUE16-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vgpr_32 = REG_SEQUENCE [[V_ASHRREV_I16_t16_e64_]], %subreg.lo16, [[V_MOV_B16_t16_e64_]], %subreg.hi16
|
|
; GFX11-TRUE16-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
|
|
;
|
|
; GFX11-FAKE16-LABEL: name: ashr_s16_s16_vv_zext_to_s32
|
|
; GFX11-FAKE16: liveins: $vgpr0, $vgpr1
|
|
; GFX11-FAKE16-NEXT: {{ $}}
|
|
; GFX11-FAKE16-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; GFX11-FAKE16-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
|
|
; GFX11-FAKE16-NEXT: [[V_ASHRREV_I16_fake16_e64_:%[0-9]+]]:vgpr_32 = V_ASHRREV_I16_fake16_e64 [[COPY1]], [[COPY]], implicit $exec
|
|
; GFX11-FAKE16-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 65535
|
|
; GFX11-FAKE16-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[S_MOV_B32_]], [[V_ASHRREV_I16_fake16_e64_]], implicit $exec
|
|
; GFX11-FAKE16-NEXT: S_ENDPGM 0, implicit [[V_AND_B32_e64_]]
|
|
%0:vgpr(s32) = COPY $vgpr0
|
|
%1:vgpr(s32) = COPY $vgpr1
|
|
%2:vgpr(s16) = G_TRUNC %0
|
|
%3:vgpr(s16) = G_TRUNC %1
|
|
%4:vgpr(s16) = G_ASHR %2, %3
|
|
%5:vgpr(s32) = G_ZEXT %4
|
|
S_ENDPGM 0, implicit %5
|
|
...
|
|
|
|
---
|
|
name: ashr_s16_vv_zext_to_s64
|
|
legalized: true
|
|
regBankSelected: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $vgpr0, $vgpr1
|
|
|
|
; GFX8-LABEL: name: ashr_s16_vv_zext_to_s64
|
|
; GFX8: liveins: $vgpr0, $vgpr1
|
|
; GFX8-NEXT: {{ $}}
|
|
; GFX8-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; GFX8-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
|
|
; GFX8-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
; GFX8-NEXT: [[V_ASHRREV_I16_e64_:%[0-9]+]]:vgpr_32 = V_ASHRREV_I16_e64 [[COPY1]], [[COPY]], implicit $exec
|
|
; GFX8-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ASHRREV_I16_e64_]], %subreg.sub0, [[V_MOV_B32_e32_]], %subreg.sub1
|
|
; GFX8-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
|
|
;
|
|
; GFX9-LABEL: name: ashr_s16_vv_zext_to_s64
|
|
; GFX9: liveins: $vgpr0, $vgpr1
|
|
; GFX9-NEXT: {{ $}}
|
|
; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
|
|
; GFX9-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
; GFX9-NEXT: [[V_ASHRREV_I16_e64_:%[0-9]+]]:vgpr_32 = V_ASHRREV_I16_e64 [[COPY1]], [[COPY]], implicit $exec
|
|
; GFX9-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ASHRREV_I16_e64_]], %subreg.sub0, [[V_MOV_B32_e32_]], %subreg.sub1
|
|
; GFX9-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
|
|
;
|
|
; GFX10-LABEL: name: ashr_s16_vv_zext_to_s64
|
|
; GFX10: liveins: $vgpr0, $vgpr1
|
|
; GFX10-NEXT: {{ $}}
|
|
; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; GFX10-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
|
|
; GFX10-NEXT: [[V_ASHRREV_I16_opsel_e64_:%[0-9]+]]:vgpr_32 = V_ASHRREV_I16_opsel_e64 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $exec
|
|
; GFX10-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
|
|
; GFX10-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 65535
|
|
; GFX10-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[S_MOV_B32_1]], [[V_ASHRREV_I16_opsel_e64_]], implicit $exec
|
|
; GFX10-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
|
|
; GFX10-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_AND_B32_e64_]], %subreg.sub0, [[COPY2]], %subreg.sub1
|
|
; GFX10-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
|
|
;
|
|
; GFX11-TRUE16-LABEL: name: ashr_s16_vv_zext_to_s64
|
|
; GFX11-TRUE16: liveins: $vgpr0, $vgpr1
|
|
; GFX11-TRUE16-NEXT: {{ $}}
|
|
; GFX11-TRUE16-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; GFX11-TRUE16-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
|
|
; GFX11-TRUE16-NEXT: [[COPY2:%[0-9]+]]:vgpr_16 = COPY [[COPY]].lo16
|
|
; GFX11-TRUE16-NEXT: [[COPY3:%[0-9]+]]:vgpr_16 = COPY [[COPY1]].lo16
|
|
; GFX11-TRUE16-NEXT: [[V_ASHRREV_I16_t16_e64_:%[0-9]+]]:vgpr_16 = V_ASHRREV_I16_t16_e64 0, [[COPY3]], 0, [[COPY2]], 0, implicit $exec
|
|
; GFX11-TRUE16-NEXT: [[V_MOV_B32_e32_:%[0-9]+]]:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
|
|
; GFX11-TRUE16-NEXT: [[V_MOV_B16_t16_e64_:%[0-9]+]]:vgpr_16 = V_MOV_B16_t16_e64 0, 0, 0, implicit $exec
|
|
; GFX11-TRUE16-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_ASHRREV_I16_t16_e64_]], %subreg.lo16, [[V_MOV_B16_t16_e64_]], %subreg.hi16, [[V_MOV_B32_e32_]], %subreg.sub1
|
|
; GFX11-TRUE16-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
|
|
;
|
|
; GFX11-FAKE16-LABEL: name: ashr_s16_vv_zext_to_s64
|
|
; GFX11-FAKE16: liveins: $vgpr0, $vgpr1
|
|
; GFX11-FAKE16-NEXT: {{ $}}
|
|
; GFX11-FAKE16-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; GFX11-FAKE16-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
|
|
; GFX11-FAKE16-NEXT: [[V_ASHRREV_I16_fake16_e64_:%[0-9]+]]:vgpr_32 = V_ASHRREV_I16_fake16_e64 [[COPY1]], [[COPY]], implicit $exec
|
|
; GFX11-FAKE16-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 0
|
|
; GFX11-FAKE16-NEXT: [[S_MOV_B32_1:%[0-9]+]]:sreg_32 = S_MOV_B32 65535
|
|
; GFX11-FAKE16-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[S_MOV_B32_1]], [[V_ASHRREV_I16_fake16_e64_]], implicit $exec
|
|
; GFX11-FAKE16-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
|
|
; GFX11-FAKE16-NEXT: [[REG_SEQUENCE:%[0-9]+]]:vreg_64 = REG_SEQUENCE [[V_AND_B32_e64_]], %subreg.sub0, [[COPY2]], %subreg.sub1
|
|
; GFX11-FAKE16-NEXT: S_ENDPGM 0, implicit [[REG_SEQUENCE]]
|
|
%0:vgpr(s32) = COPY $vgpr0
|
|
%1:vgpr(s32) = COPY $vgpr1
|
|
%2:vgpr(s16) = G_TRUNC %0
|
|
%3:vgpr(s16) = G_TRUNC %1
|
|
%4:vgpr(s16) = G_ASHR %2, %3
|
|
%5:vgpr(s64) = G_ZEXT %4
|
|
S_ENDPGM 0, implicit %5
|
|
...
|
|
|
|
---
|
|
name: ashr_s16_s32_ss
|
|
legalized: true
|
|
regBankSelected: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $sgpr0, $sgpr1
|
|
|
|
; GFX8-LABEL: name: ashr_s16_s32_ss
|
|
; GFX8: liveins: $sgpr0, $sgpr1
|
|
; GFX8-NEXT: {{ $}}
|
|
; GFX8-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
|
; GFX8-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
|
|
; GFX8-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
|
|
; GFX8-NEXT: [[ASHR:%[0-9]+]]:sgpr(s16) = G_ASHR [[TRUNC]], [[COPY1]](s32)
|
|
; GFX8-NEXT: S_ENDPGM 0, implicit [[ASHR]](s16)
|
|
;
|
|
; GFX9-LABEL: name: ashr_s16_s32_ss
|
|
; GFX9: liveins: $sgpr0, $sgpr1
|
|
; GFX9-NEXT: {{ $}}
|
|
; GFX9-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
|
; GFX9-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
|
|
; GFX9-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
|
|
; GFX9-NEXT: [[ASHR:%[0-9]+]]:sgpr(s16) = G_ASHR [[TRUNC]], [[COPY1]](s32)
|
|
; GFX9-NEXT: S_ENDPGM 0, implicit [[ASHR]](s16)
|
|
;
|
|
; GFX10-LABEL: name: ashr_s16_s32_ss
|
|
; GFX10: liveins: $sgpr0, $sgpr1
|
|
; GFX10-NEXT: {{ $}}
|
|
; GFX10-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
|
; GFX10-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
|
|
; GFX10-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
|
|
; GFX10-NEXT: [[ASHR:%[0-9]+]]:sgpr(s16) = G_ASHR [[TRUNC]], [[COPY1]](s32)
|
|
; GFX10-NEXT: S_ENDPGM 0, implicit [[ASHR]](s16)
|
|
;
|
|
; GFX11-LABEL: name: ashr_s16_s32_ss
|
|
; GFX11: liveins: $sgpr0, $sgpr1
|
|
; GFX11-NEXT: {{ $}}
|
|
; GFX11-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
|
; GFX11-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr1
|
|
; GFX11-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
|
|
; GFX11-NEXT: [[ASHR:%[0-9]+]]:sgpr(s16) = G_ASHR [[TRUNC]], [[COPY1]](s32)
|
|
; GFX11-NEXT: S_ENDPGM 0, implicit [[ASHR]](s16)
|
|
%0:sgpr(s32) = COPY $sgpr0
|
|
%1:sgpr(s32) = COPY $sgpr1
|
|
%2:sgpr(s16) = G_TRUNC %0
|
|
%3:sgpr(s16) = G_ASHR %2, %1
|
|
S_ENDPGM 0, implicit %3
|
|
...
|
|
|
|
---
|
|
name: ashr_s16_s32_sv
|
|
legalized: true
|
|
regBankSelected: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $sgpr0, $vgpr0
|
|
; GFX8-LABEL: name: ashr_s16_s32_sv
|
|
; GFX8: liveins: $sgpr0, $vgpr0
|
|
; GFX8-NEXT: {{ $}}
|
|
; GFX8-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
|
; GFX8-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
|
; GFX8-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
|
|
; GFX8-NEXT: [[ASHR:%[0-9]+]]:vgpr(s16) = G_ASHR [[TRUNC]], [[COPY1]](s32)
|
|
; GFX8-NEXT: S_ENDPGM 0, implicit [[ASHR]](s16)
|
|
;
|
|
; GFX9-LABEL: name: ashr_s16_s32_sv
|
|
; GFX9: liveins: $sgpr0, $vgpr0
|
|
; GFX9-NEXT: {{ $}}
|
|
; GFX9-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
|
; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
|
; GFX9-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
|
|
; GFX9-NEXT: [[ASHR:%[0-9]+]]:vgpr(s16) = G_ASHR [[TRUNC]], [[COPY1]](s32)
|
|
; GFX9-NEXT: S_ENDPGM 0, implicit [[ASHR]](s16)
|
|
;
|
|
; GFX10-LABEL: name: ashr_s16_s32_sv
|
|
; GFX10: liveins: $sgpr0, $vgpr0
|
|
; GFX10-NEXT: {{ $}}
|
|
; GFX10-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
|
; GFX10-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
|
; GFX10-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
|
|
; GFX10-NEXT: [[ASHR:%[0-9]+]]:vgpr(s16) = G_ASHR [[TRUNC]], [[COPY1]](s32)
|
|
; GFX10-NEXT: S_ENDPGM 0, implicit [[ASHR]](s16)
|
|
;
|
|
; GFX11-LABEL: name: ashr_s16_s32_sv
|
|
; GFX11: liveins: $sgpr0, $vgpr0
|
|
; GFX11-NEXT: {{ $}}
|
|
; GFX11-NEXT: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
|
; GFX11-NEXT: [[COPY1:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
|
; GFX11-NEXT: [[TRUNC:%[0-9]+]]:sgpr(s16) = G_TRUNC [[COPY]](s32)
|
|
; GFX11-NEXT: [[ASHR:%[0-9]+]]:vgpr(s16) = G_ASHR [[TRUNC]], [[COPY1]](s32)
|
|
; GFX11-NEXT: S_ENDPGM 0, implicit [[ASHR]](s16)
|
|
%0:sgpr(s32) = COPY $sgpr0
|
|
%1:vgpr(s32) = COPY $vgpr0
|
|
%2:sgpr(s16) = G_TRUNC %0
|
|
%3:vgpr(s16) = G_ASHR %2, %1
|
|
S_ENDPGM 0, implicit %3
|
|
...
|
|
|
|
---
|
|
name: ashr_s16_s16_sv
|
|
legalized: true
|
|
regBankSelected: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $sgpr0, $vgpr0
|
|
; GFX8-LABEL: name: ashr_s16_s16_sv
|
|
; GFX8: liveins: $sgpr0, $vgpr0
|
|
; GFX8-NEXT: {{ $}}
|
|
; GFX8-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; GFX8-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; GFX8-NEXT: [[V_ASHRREV_I16_e64_:%[0-9]+]]:vgpr_32 = V_ASHRREV_I16_e64 [[COPY1]], [[COPY]], implicit $exec
|
|
; GFX8-NEXT: S_ENDPGM 0, implicit [[V_ASHRREV_I16_e64_]]
|
|
;
|
|
; GFX9-LABEL: name: ashr_s16_s16_sv
|
|
; GFX9: liveins: $sgpr0, $vgpr0
|
|
; GFX9-NEXT: {{ $}}
|
|
; GFX9-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; GFX9-NEXT: [[V_ASHRREV_I16_e64_:%[0-9]+]]:vgpr_32 = V_ASHRREV_I16_e64 [[COPY1]], [[COPY]], implicit $exec
|
|
; GFX9-NEXT: S_ENDPGM 0, implicit [[V_ASHRREV_I16_e64_]]
|
|
;
|
|
; GFX10-LABEL: name: ashr_s16_s16_sv
|
|
; GFX10: liveins: $sgpr0, $vgpr0
|
|
; GFX10-NEXT: {{ $}}
|
|
; GFX10-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; GFX10-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; GFX10-NEXT: [[V_ASHRREV_I16_opsel_e64_:%[0-9]+]]:vgpr_32 = V_ASHRREV_I16_opsel_e64 0, [[COPY1]], 0, [[COPY]], 0, 0, implicit $exec
|
|
; GFX10-NEXT: S_ENDPGM 0, implicit [[V_ASHRREV_I16_opsel_e64_]]
|
|
;
|
|
; GFX11-TRUE16-LABEL: name: ashr_s16_s16_sv
|
|
; GFX11-TRUE16: liveins: $sgpr0, $vgpr0
|
|
; GFX11-TRUE16-NEXT: {{ $}}
|
|
; GFX11-TRUE16-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; GFX11-TRUE16-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; GFX11-TRUE16-NEXT: [[COPY2:%[0-9]+]]:vgpr_16 = COPY [[COPY1]].lo16
|
|
; GFX11-TRUE16-NEXT: [[V_ASHRREV_I16_t16_e64_:%[0-9]+]]:vgpr_16 = V_ASHRREV_I16_t16_e64 0, [[COPY2]], 0, [[COPY]], 0, implicit $exec
|
|
; GFX11-TRUE16-NEXT: S_ENDPGM 0, implicit [[V_ASHRREV_I16_t16_e64_]]
|
|
;
|
|
; GFX11-FAKE16-LABEL: name: ashr_s16_s16_sv
|
|
; GFX11-FAKE16: liveins: $sgpr0, $vgpr0
|
|
; GFX11-FAKE16-NEXT: {{ $}}
|
|
; GFX11-FAKE16-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
|
|
; GFX11-FAKE16-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
|
|
; GFX11-FAKE16-NEXT: [[V_ASHRREV_I16_fake16_e64_:%[0-9]+]]:vgpr_32 = V_ASHRREV_I16_fake16_e64 [[COPY1]], [[COPY]], implicit $exec
|
|
; GFX11-FAKE16-NEXT: S_ENDPGM 0, implicit [[V_ASHRREV_I16_fake16_e64_]]
|
|
%0:sgpr(s32) = COPY $sgpr0
|
|
%1:vgpr(s32) = COPY $vgpr0
|
|
%2:sgpr(s16) = G_TRUNC %0
|
|
%3:vgpr(s16) = G_TRUNC %1
|
|
%4:vgpr(s16) = G_ASHR %2, %3
|
|
S_ENDPGM 0, implicit %4
|
|
...
|
|
|
|
---
|
|
name: ashr_s16_s32_vs
|
|
legalized: true
|
|
regBankSelected: true
|
|
|
|
body: |
|
|
bb.0:
|
|
liveins: $sgpr0, $vgpr0
|
|
; GFX8-LABEL: name: ashr_s16_s32_vs
|
|
; GFX8: liveins: $sgpr0, $vgpr0
|
|
; GFX8-NEXT: {{ $}}
|
|
; GFX8-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
|
; GFX8-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
|
; GFX8-NEXT: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
|
|
; GFX8-NEXT: [[ASHR:%[0-9]+]]:vgpr(s16) = G_ASHR [[TRUNC]], [[COPY1]](s32)
|
|
; GFX8-NEXT: S_ENDPGM 0, implicit [[ASHR]](s16)
|
|
;
|
|
; GFX9-LABEL: name: ashr_s16_s32_vs
|
|
; GFX9: liveins: $sgpr0, $vgpr0
|
|
; GFX9-NEXT: {{ $}}
|
|
; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
|
; GFX9-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
|
; GFX9-NEXT: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
|
|
; GFX9-NEXT: [[ASHR:%[0-9]+]]:vgpr(s16) = G_ASHR [[TRUNC]], [[COPY1]](s32)
|
|
; GFX9-NEXT: S_ENDPGM 0, implicit [[ASHR]](s16)
|
|
;
|
|
; GFX10-LABEL: name: ashr_s16_s32_vs
|
|
; GFX10: liveins: $sgpr0, $vgpr0
|
|
; GFX10-NEXT: {{ $}}
|
|
; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
|
; GFX10-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
|
; GFX10-NEXT: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
|
|
; GFX10-NEXT: [[ASHR:%[0-9]+]]:vgpr(s16) = G_ASHR [[TRUNC]], [[COPY1]](s32)
|
|
; GFX10-NEXT: S_ENDPGM 0, implicit [[ASHR]](s16)
|
|
;
|
|
; GFX11-LABEL: name: ashr_s16_s32_vs
|
|
; GFX11: liveins: $sgpr0, $vgpr0
|
|
; GFX11-NEXT: {{ $}}
|
|
; GFX11-NEXT: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
|
|
; GFX11-NEXT: [[COPY1:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
|
|
; GFX11-NEXT: [[TRUNC:%[0-9]+]]:vgpr(s16) = G_TRUNC [[COPY]](s32)
|
|
; GFX11-NEXT: [[ASHR:%[0-9]+]]:vgpr(s16) = G_ASHR [[TRUNC]], [[COPY1]](s32)
|
|
; GFX11-NEXT: S_ENDPGM 0, implicit [[ASHR]](s16)
|
|
%0:vgpr(s32) = COPY $vgpr0
|
|
%1:sgpr(s32) = COPY $sgpr0
|
|
%2:vgpr(s16) = G_TRUNC %0
|
|
%3:vgpr(s16) = G_ASHR %2, %1
|
|
S_ENDPGM 0, implicit %3
|
|
...
|