TheRock/compiler/amd-llvm/llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-ashr.v2s16.mir

# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=instruction-select -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefix=GFX9 %s
# RUN: FileCheck -check-prefixes=ERR-GFX910,ERR %s < %t

# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefix=GFX10 %s
# RUN: llc -mtriple=amdgcn -mcpu=gfx1100 -run-pass=instruction-select -global-isel-abort=2 -pass-remarks-missed='gisel*' -verify-machineinstrs %s -o - 2>%t | FileCheck -check-prefix=GFX10 %s
# RUN: FileCheck -check-prefixes=ERR-GFX910,ERR %s < %t

# ERR-NOT: remark
# ERR-GFX910: remark: <unknown>:0:0: cannot select: %2:sgpr(<2 x s16>) = G_ASHR %0:sgpr, %1:sgpr(<2 x s16>) (in function: ashr_v2s16_ss)
# ERR-NOT: remark

---
name: ashr_v2s16_ss
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $sgpr0, $sgpr1
    ; GFX9-LABEL: name: ashr_v2s16_ss
    ; GFX9: liveins: $sgpr0, $sgpr1
    ; GFX9-NEXT: {{  $}}
    ; GFX9-NEXT: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
    ; GFX9-NEXT: [[COPY1:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr1
    ; GFX9-NEXT: [[ASHR:%[0-9]+]]:sgpr(<2 x s16>) = G_ASHR [[COPY]], [[COPY1]](<2 x s16>)
    ; GFX9-NEXT: S_ENDPGM 0, implicit [[ASHR]](<2 x s16>)
    ; GFX10-LABEL: name: ashr_v2s16_ss
    ; GFX10: liveins: $sgpr0, $sgpr1
    ; GFX10-NEXT: {{  $}}
    ; GFX10-NEXT: [[COPY:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr0
    ; GFX10-NEXT: [[COPY1:%[0-9]+]]:sgpr(<2 x s16>) = COPY $sgpr1
    ; GFX10-NEXT: [[ASHR:%[0-9]+]]:sgpr(<2 x s16>) = G_ASHR [[COPY]], [[COPY1]](<2 x s16>)
    ; GFX10-NEXT: S_ENDPGM 0, implicit [[ASHR]](<2 x s16>)
    %0:sgpr(<2 x s16>) = COPY $sgpr0
    %1:sgpr(<2 x s16>) = COPY $sgpr1
    %2:sgpr(<2 x s16>) = G_ASHR %0, %1
    S_ENDPGM 0, implicit %2
...

---
name: ashr_v2s16_sv
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $sgpr0, $vgpr0
    ; GFX9-LABEL: name: ashr_v2s16_sv
    ; GFX9: liveins: $sgpr0, $vgpr0
    ; GFX9-NEXT: {{  $}}
    ; GFX9-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GFX9-NEXT: [[V_PK_ASHRREV_I16_:%[0-9]+]]:vgpr_32 = V_PK_ASHRREV_I16 8, [[COPY1]], 8, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
    ; GFX9-NEXT: S_ENDPGM 0, implicit [[V_PK_ASHRREV_I16_]]
    ; GFX10-LABEL: name: ashr_v2s16_sv
    ; GFX10: liveins: $sgpr0, $vgpr0
    ; GFX10-NEXT: {{  $}}
    ; GFX10-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX10-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GFX10-NEXT: [[V_PK_ASHRREV_I16_:%[0-9]+]]:vgpr_32 = V_PK_ASHRREV_I16 8, [[COPY1]], 8, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
    ; GFX10-NEXT: S_ENDPGM 0, implicit [[V_PK_ASHRREV_I16_]]
    %0:sgpr(<2 x s16>) = COPY $sgpr0
    %1:vgpr(<2 x s16>) = COPY $vgpr0
    %2:vgpr(<2 x s16>) = G_ASHR %0, %1
    S_ENDPGM 0, implicit %2
...

---
name: ashr_v2s16_vs
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $sgpr0, $vgpr0
    ; GFX9-LABEL: name: ashr_v2s16_vs
    ; GFX9: liveins: $sgpr0, $vgpr0
    ; GFX9-NEXT: {{  $}}
    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GFX9-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX9-NEXT: [[V_PK_ASHRREV_I16_:%[0-9]+]]:vgpr_32 = V_PK_ASHRREV_I16 8, [[COPY1]], 8, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
    ; GFX9-NEXT: S_ENDPGM 0, implicit [[V_PK_ASHRREV_I16_]]
    ; GFX10-LABEL: name: ashr_v2s16_vs
    ; GFX10: liveins: $sgpr0, $vgpr0
    ; GFX10-NEXT: {{  $}}
    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GFX10-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr0
    ; GFX10-NEXT: [[V_PK_ASHRREV_I16_:%[0-9]+]]:vgpr_32 = V_PK_ASHRREV_I16 8, [[COPY1]], 8, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
    ; GFX10-NEXT: S_ENDPGM 0, implicit [[V_PK_ASHRREV_I16_]]
    %0:vgpr(<2 x s16>) = COPY $vgpr0
    %1:sgpr(<2 x s16>) = COPY $sgpr0
    %2:vgpr(<2 x s16>) = G_ASHR %0, %1
    S_ENDPGM 0, implicit %2
...

---
name: ashr_v2s16_vv
legalized: true
regBankSelected: true

body: |
  bb.0:
    liveins: $vgpr0, $vgpr1
    ; GFX9-LABEL: name: ashr_v2s16_vv
    ; GFX9: liveins: $vgpr0, $vgpr1
    ; GFX9-NEXT: {{  $}}
    ; GFX9-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GFX9-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; GFX9-NEXT: [[V_PK_ASHRREV_I16_:%[0-9]+]]:vgpr_32 = V_PK_ASHRREV_I16 8, [[COPY1]], 8, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
    ; GFX9-NEXT: S_ENDPGM 0, implicit [[V_PK_ASHRREV_I16_]]
    ; GFX10-LABEL: name: ashr_v2s16_vv
    ; GFX10: liveins: $vgpr0, $vgpr1
    ; GFX10-NEXT: {{  $}}
    ; GFX10-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
    ; GFX10-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
    ; GFX10-NEXT: [[V_PK_ASHRREV_I16_:%[0-9]+]]:vgpr_32 = V_PK_ASHRREV_I16 8, [[COPY1]], 8, [[COPY]], 0, 0, 0, 0, 0, implicit $exec
    ; GFX10-NEXT: S_ENDPGM 0, implicit [[V_PK_ASHRREV_I16_]]
    %0:vgpr(<2 x s16>) = COPY $vgpr0
    %1:vgpr(<2 x s16>) = COPY $vgpr1
    %2:vgpr(<2 x s16>) = G_ASHR %0, %1
    S_ENDPGM 0, implicit %2
...