derek.holloway
7502bf64a4
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143 lines
7.7 KiB
YAML
143 lines
7.7 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn -mcpu=gfx900 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=WAVE64
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# RUN: llc -mtriple=amdgcn -mcpu=gfx1010 -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=WAVE32
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---
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name: i1_vcc_to_vcc_copy
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4
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; WAVE64-LABEL: name: i1_vcc_to_vcc_copy
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; WAVE64: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4
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; WAVE64-NEXT: {{ $}}
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; WAVE64-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; WAVE64-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; WAVE64-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
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; WAVE64-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3
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; WAVE64-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr4
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; WAVE64-NEXT: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
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; WAVE64-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2
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; WAVE64-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
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; WAVE64-NEXT: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[COPY5]], implicit $exec
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; WAVE64-NEXT: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY2]], 0, [[COPY1]], [[V_CMP_EQ_U32_e64_]], implicit $exec
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; WAVE64-NEXT: [[V_CNDMASK_B32_e64_1:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY4]], 0, [[COPY3]], [[V_CMP_EQ_U32_e64_]], implicit $exec
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; WAVE64-NEXT: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[DEF]]
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; WAVE64-NEXT: [[COPY7:%[0-9]+]]:vgpr_32 = COPY [[DEF]]
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; WAVE64-NEXT: EXP_DONE 0, [[V_CNDMASK_B32_e64_]], [[V_CNDMASK_B32_e64_1]], [[COPY6]], [[COPY7]], -1, 0, 15, implicit $exec
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; WAVE64-NEXT: S_ENDPGM 0
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;
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; WAVE32-LABEL: name: i1_vcc_to_vcc_copy
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; WAVE32: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3, $vgpr4
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; WAVE32-NEXT: {{ $}}
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; WAVE32-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; WAVE32-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; WAVE32-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
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; WAVE32-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3
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; WAVE32-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr4
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; WAVE32-NEXT: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
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; WAVE32-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2
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; WAVE32-NEXT: [[COPY5:%[0-9]+]]:vgpr_32 = COPY [[S_MOV_B32_]]
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; WAVE32-NEXT: [[V_CMP_EQ_U32_e64_:%[0-9]+]]:sreg_32_xm0_xexec = V_CMP_EQ_U32_e64 [[COPY]], [[COPY5]], implicit $exec
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; WAVE32-NEXT: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY2]], 0, [[COPY1]], [[V_CMP_EQ_U32_e64_]], implicit $exec
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; WAVE32-NEXT: [[V_CNDMASK_B32_e64_1:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY4]], 0, [[COPY3]], [[V_CMP_EQ_U32_e64_]], implicit $exec
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; WAVE32-NEXT: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[DEF]]
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; WAVE32-NEXT: [[COPY7:%[0-9]+]]:vgpr_32 = COPY [[DEF]]
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; WAVE32-NEXT: EXP_DONE 0, [[V_CNDMASK_B32_e64_]], [[V_CNDMASK_B32_e64_1]], [[COPY6]], [[COPY7]], -1, 0, 15, implicit $exec
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; WAVE32-NEXT: S_ENDPGM 0
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s32) = COPY $vgpr1
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%2:vgpr(s32) = COPY $vgpr2
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%3:vgpr(s32) = COPY $vgpr3
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%4:vgpr(s32) = COPY $vgpr4
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%5:sgpr(s32) = G_IMPLICIT_DEF
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%6:sgpr(s32) = G_CONSTANT i32 2
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%7:vgpr(s32) = COPY %6(s32)
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%8:vcc(s1) = G_ICMP intpred(eq), %0(s32), %7
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%9:vgpr(s32) = G_SELECT %8(s1), %1, %2
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%10:vgpr(s32) = G_SELECT %8(s1), %3, %4
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%11:vgpr(s32) = COPY %5(s32)
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%12:vgpr(s32) = COPY %5(s32)
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G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.exp), 0, 15, %9(s32), %10(s32), %11(s32), %12(s32), -1, -1
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S_ENDPGM 0
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...
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---
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name: i1_sgpr_to_vcc_copy
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $sgpr0, $vgpr0, $vgpr1, $vgpr2, $vgpr3
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; WAVE64-LABEL: name: i1_sgpr_to_vcc_copy
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; WAVE64: liveins: $sgpr0, $vgpr0, $vgpr1, $vgpr2, $vgpr3
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; WAVE64-NEXT: {{ $}}
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; WAVE64-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; WAVE64-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; WAVE64-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; WAVE64-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr2
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; WAVE64-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr3
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; WAVE64-NEXT: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
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; WAVE64-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2
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; WAVE64-NEXT: S_CMP_EQ_U32 [[COPY]], [[S_MOV_B32_]], implicit-def $scc
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; WAVE64-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $scc
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; WAVE64-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 1, [[COPY5]], implicit-def dead $scc
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; WAVE64-NEXT: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_64_xexec = V_CMP_NE_U32_e64 0, [[S_AND_B32_]], implicit $exec
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; WAVE64-NEXT: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY2]], 0, [[COPY1]], [[V_CMP_NE_U32_e64_]], implicit $exec
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; WAVE64-NEXT: [[S_AND_B32_1:%[0-9]+]]:sreg_32 = S_AND_B32 1, [[COPY5]], implicit-def dead $scc
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; WAVE64-NEXT: [[V_CMP_NE_U32_e64_1:%[0-9]+]]:sreg_64_xexec = V_CMP_NE_U32_e64 0, [[S_AND_B32_1]], implicit $exec
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; WAVE64-NEXT: [[V_CNDMASK_B32_e64_1:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY4]], 0, [[COPY3]], [[V_CMP_NE_U32_e64_1]], implicit $exec
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; WAVE64-NEXT: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[DEF]]
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; WAVE64-NEXT: [[COPY7:%[0-9]+]]:vgpr_32 = COPY [[DEF]]
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; WAVE64-NEXT: EXP_DONE 0, [[V_CNDMASK_B32_e64_]], [[V_CNDMASK_B32_e64_1]], [[COPY6]], [[COPY7]], -1, 0, 15, implicit $exec
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; WAVE64-NEXT: S_ENDPGM 0
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;
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; WAVE32-LABEL: name: i1_sgpr_to_vcc_copy
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; WAVE32: liveins: $sgpr0, $vgpr0, $vgpr1, $vgpr2, $vgpr3
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; WAVE32-NEXT: {{ $}}
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; WAVE32-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; WAVE32-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; WAVE32-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; WAVE32-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr2
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; WAVE32-NEXT: [[COPY4:%[0-9]+]]:vgpr_32 = COPY $vgpr3
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; WAVE32-NEXT: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
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; WAVE32-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 2
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; WAVE32-NEXT: S_CMP_EQ_U32 [[COPY]], [[S_MOV_B32_]], implicit-def $scc
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; WAVE32-NEXT: [[COPY5:%[0-9]+]]:sreg_32 = COPY $scc
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; WAVE32-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 1, [[COPY5]], implicit-def dead $scc
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; WAVE32-NEXT: [[V_CMP_NE_U32_e64_:%[0-9]+]]:sreg_32_xm0_xexec = V_CMP_NE_U32_e64 0, [[S_AND_B32_]], implicit $exec
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; WAVE32-NEXT: [[V_CNDMASK_B32_e64_:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY2]], 0, [[COPY1]], [[V_CMP_NE_U32_e64_]], implicit $exec
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; WAVE32-NEXT: [[S_AND_B32_1:%[0-9]+]]:sreg_32 = S_AND_B32 1, [[COPY5]], implicit-def dead $scc
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; WAVE32-NEXT: [[V_CMP_NE_U32_e64_1:%[0-9]+]]:sreg_32_xm0_xexec = V_CMP_NE_U32_e64 0, [[S_AND_B32_1]], implicit $exec
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; WAVE32-NEXT: [[V_CNDMASK_B32_e64_1:%[0-9]+]]:vgpr_32 = V_CNDMASK_B32_e64 0, [[COPY4]], 0, [[COPY3]], [[V_CMP_NE_U32_e64_1]], implicit $exec
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; WAVE32-NEXT: [[COPY6:%[0-9]+]]:vgpr_32 = COPY [[DEF]]
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; WAVE32-NEXT: [[COPY7:%[0-9]+]]:vgpr_32 = COPY [[DEF]]
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; WAVE32-NEXT: EXP_DONE 0, [[V_CNDMASK_B32_e64_]], [[V_CNDMASK_B32_e64_1]], [[COPY6]], [[COPY7]], -1, 0, 15, implicit $exec
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; WAVE32-NEXT: S_ENDPGM 0
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%0:sgpr(s32) = COPY $sgpr0
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%1:vgpr(s32) = COPY $vgpr0
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%2:vgpr(s32) = COPY $vgpr1
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%3:vgpr(s32) = COPY $vgpr2
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%4:vgpr(s32) = COPY $vgpr3
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%5:sgpr(s32) = G_IMPLICIT_DEF
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%6:sgpr(s32) = G_CONSTANT i32 2
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%7:sgpr(s32) = G_ICMP intpred(eq), %0(s32), %6
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%8:sgpr(s1) = G_TRUNC %7(s32)
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%9:vcc(s1) = COPY %8(s1)
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%10:vgpr(s32) = G_SELECT %9(s1), %1, %2
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%11:vcc(s1) = COPY %8(s1)
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%12:vgpr(s32) = G_SELECT %11(s1), %3, %4
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%13:vgpr(s32) = COPY %5(s32)
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%14:vgpr(s32) = COPY %5(s32)
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G_INTRINSIC_W_SIDE_EFFECTS intrinsic(@llvm.amdgcn.exp), 0, 15, %10(s32), %12(s32), %13(s32), %14(s32), -1, -1
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S_ENDPGM 0
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...
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