derek.holloway
7502bf64a4
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178 lines
6.3 KiB
YAML
178 lines
6.3 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn -mcpu=tahiti -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck -check-prefix=GFX6 %s
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---
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name: umed3_s32_vvv
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1, $vgpr2
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; GFX6-LABEL: name: umed3_s32_vvv
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; GFX6: liveins: $vgpr0, $vgpr1, $vgpr2
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; GFX6-NEXT: {{ $}}
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; GFX6-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX6-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX6-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
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; GFX6-NEXT: [[V_MED3_U32_e64_:%[0-9]+]]:vgpr_32 = V_MED3_U32_e64 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec
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; GFX6-NEXT: S_ENDPGM 0, implicit [[V_MED3_U32_e64_]]
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s32) = COPY $vgpr1
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%2:vgpr(s32) = COPY $vgpr2
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%3:vgpr(s32) = G_UMAX %0, %1
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%4:vgpr(s32) = G_UMIN %0, %1
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%5:vgpr(s32) = G_UMAX %4, %2
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%6:vgpr(s32) = G_UMIN %3, %5
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S_ENDPGM 0, implicit %6
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...
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---
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name: umed3_s32_sss
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0, $sgpr1, $sgpr2
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; GFX6-LABEL: name: umed3_s32_sss
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; GFX6: liveins: $sgpr0, $sgpr1, $sgpr2
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; GFX6-NEXT: {{ $}}
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; GFX6-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX6-NEXT: [[COPY1:%[0-9]+]]:sreg_32 = COPY $sgpr1
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; GFX6-NEXT: [[COPY2:%[0-9]+]]:sreg_32 = COPY $sgpr2
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; GFX6-NEXT: [[S_MAX_U32_:%[0-9]+]]:sreg_32 = S_MAX_U32 [[COPY]], [[COPY1]], implicit-def dead $scc
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; GFX6-NEXT: [[S_MIN_U32_:%[0-9]+]]:sreg_32 = S_MIN_U32 [[COPY]], [[COPY1]], implicit-def dead $scc
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; GFX6-NEXT: [[S_MAX_U32_1:%[0-9]+]]:sreg_32 = S_MAX_U32 [[S_MIN_U32_]], [[COPY2]], implicit-def dead $scc
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; GFX6-NEXT: [[S_MIN_U32_1:%[0-9]+]]:sreg_32 = S_MIN_U32 [[S_MAX_U32_]], [[S_MAX_U32_1]], implicit-def dead $scc
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; GFX6-NEXT: S_ENDPGM 0, implicit [[S_MIN_U32_1]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = COPY $sgpr1
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%2:sgpr(s32) = COPY $sgpr2
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%3:sgpr(s32) = G_UMAX %0, %1
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%4:sgpr(s32) = G_UMIN %0, %1
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%5:sgpr(s32) = G_UMAX %4, %2
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%6:sgpr(s32) = G_UMIN %3, %5
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S_ENDPGM 0, implicit %6
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...
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---
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name: umed3_s32_vvv_multiuse0
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1, $vgpr2
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; GFX6-LABEL: name: umed3_s32_vvv_multiuse0
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; GFX6: liveins: $vgpr0, $vgpr1, $vgpr2
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; GFX6-NEXT: {{ $}}
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; GFX6-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX6-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX6-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
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; GFX6-NEXT: [[V_MAX_U32_e64_:%[0-9]+]]:vgpr_32 = V_MAX_U32_e64 [[COPY]], [[COPY1]], implicit $exec
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; GFX6-NEXT: [[V_MED3_U32_e64_:%[0-9]+]]:vgpr_32 = V_MED3_U32_e64 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec
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; GFX6-NEXT: S_ENDPGM 0, implicit [[V_MED3_U32_e64_]], implicit [[V_MAX_U32_e64_]]
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s32) = COPY $vgpr1
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%2:vgpr(s32) = COPY $vgpr2
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%3:vgpr(s32) = G_UMAX %0, %1
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%4:vgpr(s32) = G_UMIN %0, %1
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%5:vgpr(s32) = G_UMAX %4, %2
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%6:vgpr(s32) = G_UMIN %3, %5
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S_ENDPGM 0, implicit %6, implicit %3
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...
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---
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name: umed3_s32_vvv_multiuse1
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1, $vgpr2
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; GFX6-LABEL: name: umed3_s32_vvv_multiuse1
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; GFX6: liveins: $vgpr0, $vgpr1, $vgpr2
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; GFX6-NEXT: {{ $}}
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; GFX6-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX6-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX6-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
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; GFX6-NEXT: [[V_MIN_U32_e64_:%[0-9]+]]:vgpr_32 = V_MIN_U32_e64 [[COPY]], [[COPY1]], implicit $exec
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; GFX6-NEXT: [[V_MED3_U32_e64_:%[0-9]+]]:vgpr_32 = V_MED3_U32_e64 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec
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; GFX6-NEXT: S_ENDPGM 0, implicit [[V_MED3_U32_e64_]], implicit [[V_MIN_U32_e64_]]
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s32) = COPY $vgpr1
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%2:vgpr(s32) = COPY $vgpr2
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%3:vgpr(s32) = G_UMAX %0, %1
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%4:vgpr(s32) = G_UMIN %0, %1
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%5:vgpr(s32) = G_UMAX %4, %2
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%6:vgpr(s32) = G_UMIN %3, %5
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S_ENDPGM 0, implicit %6, implicit %4
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...
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---
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name: umed3_s32_vvv_multiuse2
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1, $vgpr2
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; GFX6-LABEL: name: umed3_s32_vvv_multiuse2
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; GFX6: liveins: $vgpr0, $vgpr1, $vgpr2
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; GFX6-NEXT: {{ $}}
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; GFX6-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX6-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX6-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
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; GFX6-NEXT: [[V_MIN_U32_e64_:%[0-9]+]]:vgpr_32 = V_MIN_U32_e64 [[COPY]], [[COPY1]], implicit $exec
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; GFX6-NEXT: [[V_MAX_U32_e64_:%[0-9]+]]:vgpr_32 = V_MAX_U32_e64 [[V_MIN_U32_e64_]], [[COPY2]], implicit $exec
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; GFX6-NEXT: [[V_MED3_U32_e64_:%[0-9]+]]:vgpr_32 = V_MED3_U32_e64 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec
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; GFX6-NEXT: S_ENDPGM 0, implicit [[V_MED3_U32_e64_]], implicit [[V_MAX_U32_e64_]]
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s32) = COPY $vgpr1
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%2:vgpr(s32) = COPY $vgpr2
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%3:vgpr(s32) = G_UMAX %0, %1
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%4:vgpr(s32) = G_UMIN %0, %1
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%5:vgpr(s32) = G_UMAX %4, %2
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%6:vgpr(s32) = G_UMIN %3, %5
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S_ENDPGM 0, implicit %6, implicit %5
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...
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---
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name: smed3_s32_vvv_reuse_bounds
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
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; GFX6-LABEL: name: smed3_s32_vvv_reuse_bounds
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; GFX6: liveins: $vgpr0, $vgpr1, $vgpr2, $vgpr3
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; GFX6-NEXT: {{ $}}
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; GFX6-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GFX6-NEXT: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr1
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; GFX6-NEXT: [[COPY2:%[0-9]+]]:vgpr_32 = COPY $vgpr2
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; GFX6-NEXT: [[COPY3:%[0-9]+]]:vgpr_32 = COPY $vgpr3
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; GFX6-NEXT: [[V_MED3_U32_e64_:%[0-9]+]]:vgpr_32 = V_MED3_U32_e64 [[COPY]], [[COPY1]], [[COPY2]], implicit $exec
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; GFX6-NEXT: [[V_MED3_U32_e64_1:%[0-9]+]]:vgpr_32 = V_MED3_U32_e64 [[COPY]], [[COPY1]], [[COPY3]], implicit $exec
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; GFX6-NEXT: S_ENDPGM 0, implicit [[V_MED3_U32_e64_]], implicit [[V_MED3_U32_e64_1]]
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s32) = COPY $vgpr1
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%2:vgpr(s32) = COPY $vgpr2
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%3:vgpr(s32) = COPY $vgpr3
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%4:vgpr(s32) = G_UMAX %0, %1
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%5:vgpr(s32) = G_UMIN %0, %1
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%6:vgpr(s32) = G_UMIN %2, %4
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%7:vgpr(s32) = G_UMAX %6, %5
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%8:vgpr(s32) = G_UMIN %3, %4
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%9:vgpr(s32) = G_UMAX %8, %5
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S_ENDPGM 0, implicit %7, implicit %9
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...
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