derek.holloway
7502bf64a4
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304 lines
8.3 KiB
YAML
304 lines
8.3 KiB
YAML
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -mtriple=amdgcn -mcpu=gfx1150 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX1150 %s
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# RUN: llc -mtriple=amdgcn -mcpu=gfx1200 -run-pass=instruction-select -verify-machineinstrs -o - %s | FileCheck -check-prefix=GFX1150 %s
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---
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name: sitofp_i32_to_f32
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GFX1150-LABEL: name: sitofp_i32_to_f32
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; GFX1150: liveins: $sgpr0
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: [[S_CVT_F32_I32_:%[0-9]+]]:sreg_32 = S_CVT_F32_I32 [[COPY]], implicit $mode
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; GFX1150-NEXT: $sgpr0 = COPY [[S_CVT_F32_I32_]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = G_SITOFP %0(s32)
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$sgpr0 = COPY %1(s32)
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...
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---
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name: uitofp_u32_to_f32
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GFX1150-LABEL: name: uitofp_u32_to_f32
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; GFX1150: liveins: $sgpr0
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: [[S_CVT_F32_U32_:%[0-9]+]]:sreg_32 = S_CVT_F32_U32 [[COPY]], implicit $mode
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; GFX1150-NEXT: $sgpr0 = COPY [[S_CVT_F32_U32_]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = G_UITOFP %0(s32)
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$sgpr0 = COPY %1(s32)
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...
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---
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name: fptosi_f32_to_i32
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GFX1150-LABEL: name: fptosi_f32_to_i32
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; GFX1150: liveins: $sgpr0
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: %1:sreg_32 = nofpexcept S_CVT_I32_F32 [[COPY]], implicit $mode
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; GFX1150-NEXT: $sgpr0 = COPY %1
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = G_FPTOSI %0(s32)
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$sgpr0 = COPY %1(s32)
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...
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---
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name: fptoui_f32_to_u32
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GFX1150-LABEL: name: fptoui_f32_to_u32
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; GFX1150: liveins: $sgpr0
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: %1:sreg_32 = nofpexcept S_CVT_U32_F32 [[COPY]], implicit $mode
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; GFX1150-NEXT: $sgpr0 = COPY %1
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = G_FPTOUI %0(s32)
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$sgpr0 = COPY %1(s32)
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...
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---
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name: fpext_f16_to_f32
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GFX1150-LABEL: name: fpext_f16_to_f32
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; GFX1150: liveins: $sgpr0
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: %2:sreg_32 = nofpexcept S_CVT_F32_F16 [[COPY]], implicit $mode
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; GFX1150-NEXT: $sgpr0 = COPY %2
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s16) = G_TRUNC %0(s32)
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%2:sgpr(s32) = G_FPEXT %1(s16)
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$sgpr0 = COPY %2(s32)
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...
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---
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name: fpext_hif16_to_32
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GFX1150-LABEL: name: fpext_hif16_to_32
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; GFX1150: liveins: $sgpr0
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: [[S_CVT_HI_F32_F16_:%[0-9]+]]:sreg_32 = S_CVT_HI_F32_F16 [[COPY]], implicit $mode
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; GFX1150-NEXT: $sgpr0 = COPY [[S_CVT_HI_F32_F16_]]
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%0:sgpr(<2 x s16>) = COPY $sgpr0
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%2:sgpr(s32) = G_BITCAST %0(<2 x s16>)
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%3:sgpr(s32) = G_CONSTANT i32 16
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%4:sgpr(s32) = G_LSHR %2, %3(s32)
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%5:sgpr(s16) = G_TRUNC %4(s32)
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%6:sgpr(s32) = G_FPEXT %5(s16)
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$sgpr0 = COPY %6(s32)
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...
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---
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name: fptrunc_f32_to_f16
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GFX1150-LABEL: name: fptrunc_f32_to_f16
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; GFX1150: liveins: $sgpr0
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: %1:sreg_32 = nofpexcept S_CVT_F16_F32 [[COPY]], implicit $mode
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; GFX1150-NEXT: $sgpr0 = COPY %1
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s16) = G_FPTRUNC %0(s32)
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%2:sgpr(s32) = G_ANYEXT %1(s16)
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$sgpr0 = COPY %2(s32)
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...
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---
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name: fceil_f32
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GFX1150-LABEL: name: fceil_f32
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; GFX1150: liveins: $sgpr0
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: %1:sreg_32 = nofpexcept S_CEIL_F32 [[COPY]], implicit $mode
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; GFX1150-NEXT: $sgpr0 = COPY %1
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = G_FCEIL %0
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$sgpr0 = COPY %1(s32)
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...
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---
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name: ffloor_f32
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GFX1150-LABEL: name: ffloor_f32
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; GFX1150: liveins: $sgpr0
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: %1:sreg_32 = nofpexcept S_FLOOR_F32 [[COPY]], implicit $mode
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; GFX1150-NEXT: $sgpr0 = COPY %1
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = G_FFLOOR %0
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$sgpr0 = COPY %1(s32)
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...
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---
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name: ftrunc_f32
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GFX1150-LABEL: name: ftrunc_f32
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; GFX1150: liveins: $sgpr0
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: %1:sreg_32 = nofpexcept S_TRUNC_F32 [[COPY]], implicit $mode
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; GFX1150-NEXT: $sgpr0 = COPY %1
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = G_INTRINSIC_TRUNC %0
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$sgpr0 = COPY %1(s32)
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...
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---
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name: frint_f32
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GFX1150-LABEL: name: frint_f32
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; GFX1150: liveins: $sgpr0
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: %1:sreg_32 = nofpexcept S_RNDNE_F32 [[COPY]], implicit $mode
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; GFX1150-NEXT: $sgpr0 = COPY %1
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s32) = G_INTRINSIC_ROUNDEVEN %0
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$sgpr0 = COPY %1(s32)
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...
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---
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name: fceil_f16
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GFX1150-LABEL: name: fceil_f16
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; GFX1150: liveins: $sgpr0
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: %2:sreg_32 = nofpexcept S_CEIL_F16 [[COPY]], implicit $mode
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; GFX1150-NEXT: $sgpr0 = COPY %2
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s16) = G_TRUNC %0(s32)
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%2:sgpr(s16) = G_FCEIL %1
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%3:sgpr(s32) = G_ANYEXT %2(s16)
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$sgpr0 = COPY %3(s32)
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...
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---
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name: ffloor_f16
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GFX1150-LABEL: name: ffloor_f16
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; GFX1150: liveins: $sgpr0
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: %2:sreg_32 = nofpexcept S_FLOOR_F16 [[COPY]], implicit $mode
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; GFX1150-NEXT: $sgpr0 = COPY %2
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s16) = G_TRUNC %0(s32)
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%2:sgpr(s16) = G_FFLOOR %1
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%3:sgpr(s32) = G_ANYEXT %2(s16)
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$sgpr0 = COPY %3(s32)
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...
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---
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name: ftrunc_f16
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GFX1150-LABEL: name: ftrunc_f16
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; GFX1150: liveins: $sgpr0
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: %2:sreg_32 = nofpexcept S_TRUNC_F16 [[COPY]], implicit $mode
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; GFX1150-NEXT: $sgpr0 = COPY %2
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s16) = G_TRUNC %0(s32)
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%2:sgpr(s16) = G_INTRINSIC_TRUNC %1
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%3:sgpr(s32) = G_ANYEXT %2(s16)
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$sgpr0 = COPY %3(s32)
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...
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---
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name: frint_f16
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legalized: true
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regBankSelected: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GFX1150-LABEL: name: frint_f16
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; GFX1150: liveins: $sgpr0
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; GFX1150-NEXT: {{ $}}
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; GFX1150-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
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; GFX1150-NEXT: %2:sreg_32 = nofpexcept S_RNDNE_F16 [[COPY]], implicit $mode
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; GFX1150-NEXT: $sgpr0 = COPY %2
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%0:sgpr(s32) = COPY $sgpr0
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%1:sgpr(s16) = G_TRUNC %0(s32)
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%2:sgpr(s16) = G_INTRINSIC_ROUNDEVEN %1
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%3:sgpr(s32) = G_ANYEXT %2(s16)
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$sgpr0 = COPY %3(s32)
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...
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